Carlos Morra - researchr alias

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Viewing Publication 1 - 7 from 7

2008

Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable ArchitecturesCarlos Morra, João Bispo, João M. P. Cardoso, Jürgen Becker. fccm 2008: 320-321 [doi]

Retargeting, Evaluating, and Generating Reconfigurable Array-Based ArchitecturesCarlos Morra, João M. P. Cardoso, João Bispo, Jürgen Becker. sasp 2008: 34-41 [doi]

2007

Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing ElementsCarlos Morra, João M. P. Cardoso, Jürgen Becker. ipps 2007: 1-8 [doi]

2006

Using Rewriting Logic to Generate Different Implementations of Polynomial Approximations in Coarse-Grained ArchitecturesCarlos Morra, M. Sackmann, Jürgen Becker, Reiner W. Hartenstein. recosoc 2006: 46-51

Configware Design Space Exploration Using Rewriting LogicCarlos Morra. fpl 2006: 1-2 [doi]

From Equation to VHDL: Using Rewriting Logic for Automated Function GenerationCarlos Morra, M. Sackmann, Sunil Shukla, Jürgen Becker, Reiner W. Hartenstein. fpl 2006: 1-4 [doi]

2005

FELIX: Using Rewriting-Logic for Generating Functionally Equivalent ImplementationsCarlos Morra, Jürgen Becker, Mauricio Ayala-Rincón, Reiner W. Hartenstein. fpl 2005: 25-30

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