Charles Chiang - researchr alias

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Viewing Publication 1 - 44 from 44

2015

Machine-Learning-Based Hotspot Detection Using Topological Classification and Critical Feature ExtractionYen-Ting Yu, Geng-He Lin, Iris Hui-Ru Jiang, Charles Chiang. tcad, 34(3):460-470, 2015. [doi]

2014

DRC-based hotspot detection considering edge tolerance and incomplete specificationYen-Ting Yu, Iris Hui-Ru Jiang, Yumin Zhang, Charles Chiang. iccad 2014: 101-107 [doi]

Fast and scalable parallel layout decomposition in double patterning lithographyWei Zhao, Hailong Yao, Yici Cai, Subarna Sinha, Charles Chiang. integration, 47(2):175-183, 2014. [doi]

2013

Machine-learning-based hotspot detection using topological classification and critical feature extractionYen-Ting Yu, Geng-He Lin, Iris Hui-Ru Jiang, Charles Chiang. dac 2013: 67 [doi]

2012

Improved tangent space based distance metric for accurate lithographic hotspot classificationJing Guo, Fan Yang, Subarna Sinha, Charles Chiang, Xuan Zeng. dac 2012: 1173-1178 [doi]

Accurate process-hotspot detection using critical design rule extractionYen-Ting Yu, Ya-Chung Chan, Subarna Sinha, Iris Hui-Ru Jiang, Charles Chiang. dac 2012: 1167-1172 [doi]

2011

A distributed algorithm for layout geometry operationsKai-Ti Hsu, Subarna Sinha, Yu-Chuan Pi, Charles Chiang, Tsung-Yi Ho. dac 2011: 182-187 [doi]

2009

The road to 3D EDA tool readinessCharles Chiang, Subarna Sinha. aspdac 2009: 429-436 [doi]

2008

Hotspot Based Yield Prediction with Consideration of CorrelationsQing Su, Charles Chiang, Jamil Kawa. isqed 2008: 338-343 [doi]

Efficient range pattern matching algorithm for process-hotspot detectionHailong Yao, Subarna Sinha, Jingyu Xu, Charles Chiang, Yici Cai, Xianlong Hong. iet-cds, 2(1):2-15, 2008. [doi]

2007

Fast and Efficient Bright-Field AAPSM Conflict Detection and CorrectionCharles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky. tcad, 26(1):115-126, 2007. [doi]

DFM issues for 65nm and beyondJamil Kawa, Charles Chiang. glvlsi 2007: 318-322 [doi]

Model Based Layout Pattern Dependent Metal Filling Algorithm for Improved Chip Surface Uniformity in the Copper ProcessSubarna Sinha, Jianfeng Luo, Charles Chiang. aspdac 2007: 1-6 [doi]

A methodology for fast and accurate yield factor estimation during global routingSubarna Sinha, Charles Chiang. iccad 2007: 481-487 [doi]

A New Flexible Algorithm for Random Yield ImprovementSubarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn. isqed 2007: 795-800 [doi]

Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process VariationsJun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles Chiang. aspdac 2007: 474-479 [doi]

Accurate detection for process-hotspots with vias and incomplete specificationJingyu Xu, Subarna Sinha, Charles Chiang. iccad 2007: 839-846 [doi]

2006

Three DFM Challenges: Random Defects, Thickness Variation, and Printability VariationCharles Chiang, Jamil Kawa. apccas 2006: 1099-1102 [doi]

EDA Challenges in Nano-scale TechnologyJamil Kawa, Charles Chiang, Raul Camposano. cicc 2006: 845-851 [doi]

An IC manufacturing yield model considering intra-die variationsJianfeng Luo, Subarna Sinha, Qing Su, Jamil Kawa, Charles Chiang. dac 2006: 749-754 [doi]

DFM: swimming upstreamDan Page, Jamil Kawa, Charles Chiang. glvlsi 2006: 1 [doi]

Accurate modeling of substrate resistive coupling for floating substratesQing Su, Jamil Kawa, Charles Chiang, Yehia Massoud. todaes, 11(1):44-51, 2006. [doi]

A one-shot projection method for interconnects with process variationsJun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles Chiang. iscas 2006: [doi]

Efficient process-hotspot detection using range pattern matchingHailong Yao, Subarna Sinha, Charles Chiang, Xianlong Hong, Yici Cai. iccad 2006: 625-632 [doi]

Time domain model order reduction by wavelet collocation methodXuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles Chiang. date 2006: 21-26 [doi]

2005

Fast and efficient phase conflict detection and correction in standard-cell layoutsCharles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu. iccad 2005: 149-156

Bright-Field AAPSM Conflict Detection and CorrectionCharles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky. date 2005: 908-913 [doi]

Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuitsBang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles Chiang, Dian Zhou. aspdac 2005: 244-249 [doi]

A layout dependent full-chip copper electroplating topography modelJianfeng Luo, Qing Su, Charles Chiang, Jamil Kawa. iccad 2005: 133-140

A Min-Variance Iterative Method for Fast Smart Dummy Feature Density Assignment in Chemical-Mechanical PolishingXin Wang, Charles Chiang, Jamil Kawa, Qing Su. isqed 2005: 258-263 [doi]

Domain Specific Non-Uniform Routing Architecture for Embedded Programmable IP Core (abstract only)Wen Yujie, Jiarong Tong, Charles Chiang. fpga 2005: 269 [doi]

A novel wavelet method for noise analysis of nonlinear circuitsXuan Zeng, Bank Liu, Jun Tao, Charles Chiang, Dian Zhou. aspdac 2005: 471-476 [doi]

2004

Routing resources consumption on M-arch and X-archBo-Kyung Choi, Charles Chiang, Jamil Kawa, Majid Sarrafzadeh. iscas 2004: 73-76

Direct Nonlinear Order Reduction with Variational AnalysisLihong Feng, Xuan Zeng, Charles Chiang, Dian Zhou, Qiang Fang. date 2004: 1316-1321 [doi]

Two-sided projection method in variational equation model order reduction of nonlinear circuitsLihong Feng, Xuan Zeng, Jiarong Tong, Charles Chiang, Dian Zhou. iscas 2004: 816-819

SAPOR: second-order Arnoldi method for passive order reduction of RCS circuitsYangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles Chiang, Dian Zhou. iccad 2004: 74-79 [doi]

Analog circuit behavioral modeling via wavelet collocation method with auto-compandingJian Wang, Jun Tao, Xuan Zeng, Charles Chiang, Dian Zhou. aspdac 2004: 45-50 [doi]

Frequency domain wavelet method with GMRES for large-scale linear circuit simulationJian Wang, Xuan Zeng, Wei Cai, Charles Chiang, Jiarong Tong, Dian Zhou. iscas 2004: 321-324

Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution MethodXin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles Chiang. date 2004: 1322-1326 [doi]

2003

Wirelength reduction by using diagonal wireCharles Chiang, Qing Su, Ching-Shoei Chiang. glvlsi 2003: 104-107 [doi]

1994

A weighted Steiner tree-based global router with simultaneous length and density minimizationCharles Chiang, Chak-Kuen Wong, Majid Sarrafzadeh. tcad, 13(12):1461-1469, 1994. [doi]

1991

On wiring overlap layoutsCharles Chiang. glvlsi 1991: 25-30 [doi]

1990

Global routing based on Steiner min-max treesCharles Chiang, Majid Sarrafzadeh, Chak-Kuen Wong. tcad, 9(12):1318-1325, 1990. [doi]

1989

A powerful global router: based on Steiner min-max treesCharles Chiang, Majid Sarrafzadeh, Chak-Kuen Wong. iccad 1989: 2-5 [doi]

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