D. Scott Wills - researchr alias

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2011

2010

2008

An Instruction Throughput Model of Superscalar ProcessorsTarek M. Taha, D. Scott Wills. TC, 57(3):389-403, 2008. [doi]

2007

2005

Reducing Operand Communication Overhead using Instruction Clustering for Multimedia ApplicationHongkyu Kim, D. Scott Wills, Linda M. Wills. ism 2005: 345-352 [doi]

Architectural Enhancements for Color Image and Video Processing on Embedded SystemsJongmyon Kim, D. Scott Wills, Linda M. Wills. APCSAC 2005: 104-117 [doi]

Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand TransportHongkyu Kim, D. Scott Wills, Linda M. Wills. ipps 2005: [doi]

Determining Optimal Grain Size for Efficient Vector Processing on SIMD Image Processing ArchitecturesJongmyon Kim, D. Scott Wills, Linda M. Wills. APCSAC 2005: 551-565 [doi]

Implementing and Evaluating Color-Aware Instruction Set for Low-Memory, Embedded Video Processing in Data Parallel ArchitecturesJongmyon Kim, D. Scott Wills, Linda M. Wills. euc 2005: 4-16 [doi]

Efficiency Analysis for a Mixed-Signal Focal Plane Processing ArchitectureWilliam H. Robinson, D. Scott Wills. vlsisp, 41(1):65-80, 2005. [doi]

Static strands: safely collapsing dependence chains for increasing embedded power efficiencyPeter G. Sassone, D. Scott Wills, Gabriel H. Loh. lctrts 2005: 127-136 [doi]

Scaling Up the Atlas Chip-MultiprocessorPeter G. Sassone, D. Scott Wills. TC, 54(1):82-87, 2005. [doi]

2004

2003

2002

2001

Architecture of the Atlas Chip-Multiprocessor: Dynamically Parallelizing Irregular ApplicationsLucian Codrescu, D. Scott Wills, James D. Meindl. TC, 50(1):67-82, 2001. [doi]

Impact of Pixel per Processor Ratio on Embedded SIMD ArchitecturesAntonio Gentile, D. Scott Wills. iciap 2001: 204-208 [doi]

Cost Modeling or Early Image Processing ApplicationsWilliam H. Robinson, D. Scott Wills. dcv 2001: 29 [doi]

2000

Heterogeneous architecture models for interconnect-motivated system designSek M. Chai, Tarek M. Taha, D. Scott Wills, James D. Meindl. tvlsi, 8(6):660-670, 2000. [doi]

On Dynamic Speculative Thread Partitioning and the MEM-Slicing AlgorithmLucian Codrescu, D. Scott Wills. jucs, 6(10):908-927, 2000. [doi]

Inductive Noise Reduction at the Architectural LevelMondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari. vlsid 2000: 162-167 [doi]

1999

Impact of Power Density Limitation in Gigascale Integration for the SIMD Pixel ProcessorSek M. Chai, Antonio Gentile, D. Scott Wills. arvlsi 1999: 57-71 [doi]

Fully differential current-input CMOS amplifier front-end suppressing mixed signal substrate noise for optoelectronic applicationsJ. J. Chang, Myunghee Lee, Sungyong Jung, Martin A. Brooke, Nan M. Jokerst, D. Scott Wills. iscas 1999: 327-330 [doi]

On Dynamic Speculative Thread Partitioning and the MEM-Slicing AlgorithmLucian Codrescu, D. Scott Wills. IEEEpact 1999: 40-46 [doi]

Architecture of the Atlas Chip-Multiprocessor: Dynamically Parallelizing Irregular ApplicationsLucian Codrescu, D. Scott Wills. iccd 1999: 428-435 [doi]

Exploring Microprocessor Architectures for Gigascale IntegrationLucian Codrescu, Mondira Deb Pant, Tarek M. Taha, John Eble, D. Scott Wills, James D. Meindl. arvlsi 1999: 242-255 [doi]

Real-Time Image Processing on a Focal Plane SIMD ArrayAntonio Gentile, José Cruz-Rivera, D. Scott Wills, Leugim Bustelo, José J. Figueroa, Javier E. Fonseca-Camacho, Wilfredo E. Lugo-Beauchamp, Ricardo Olivieri, Marlyn Quiñones-Cerpa, Alexis H. Rivera-Ríos, Iomar Vargas-Gonzáles, Michelle Viera-Vera. ipps 1999: 400-405

An architectural solution for the inductive noise problem due to clock-gatingMondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari. islped 1999: 255-257 [doi]

Adaptive digital bias control for an optical receiver and transmitterJinsung Park, J. A. Tabler, Martin A. Brooke, Nan M. Jokerst, D. Scott Wills. iscas 1999: 323-326 [doi]

1998

1997

1996

Modeling the Technology Impact on the Design of a Two-Level Multicomputer Interconnection NetworkJosé Cruz-Rivera, D. Scott Wills, Thomas K. Gaylord, Elias N. Glytsis. iccd 1996: 165-169 [doi]

Real-Time Implementation of Full-Search Vector Quantization on a Low Memory SIMD ArchitectureAntonio Gentile, Huy Cat, Faouzi Kossentini, Filippo Sorbello, D. Scott Wills. dcc 1996: 438

1995

Hoisting Branch Conditions - Improving Super-Scalar Processor PerformanceWilliam F. Appelbe, Srinivas Doddapaneni, Reid Harmon, Phil May, D. Scott Wills, Maurizio Vitale. lcpc 1996: 304-317

Silicon VLSI processing architectures incorporating integrated optoelectronic devicesHuy Cat, Myunghee Lee, Brent Buchanan, D. Scott Wills, Martin A. Brooke, Nan M. Jokerst. arvlsi 1995: 17-27 [doi]

1994

The Offset Cube: An Optoelectronic Interconnection NetworkD. Scott Wills, W. Stephen Lacy, José Cruz-Rivera. pcrcw 1994: 86-100

1993

Pica: An Ultra-Light Processor for High-Througput ApplicationsD. Scott Wills, W. Stephen Lacy, Huy Cat, Michael A. Hopper, Ashutosh Razdan, Sek M. Chai. iccd 1993: 410-414

A Scalable Optical Interconnection Network for Fine-Grain Parallel ArchitecturesD. Scott Wills, Matthias Grossglauser. icpp 1993: 154-157

1992

The Message Driven Processor: An Integrated Multicomputer Processing ElementWilliam J. Dally, Andrew A. Chien, Stuart Fiske, Greg Fyler, Waldemar Horwat, John S. Keen, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, D. Scott Wills. iccd 1992: 416-419

1989

Universal Mechanisms for ConcurrencyWilliam J. Dally, D. Scott Wills. parle 1989: 19-33

The J-Machine: A Fine-Gain Concurrent ComputerWilliam J. Dally, Andrew A. Chien, Stuart Fiske, Waldemar Horwat, John S. Keen, Michael Larivee, Richard A. Lethin, Peter R. Nuth, D. Scott Wills. ifip 1989: 1147-1153

1988

Tokenless static data flow using associative templatesThomas L. Sterling, D. Scott Wills, Ellery Y. Chan. sc 1988: 70-79 [doi]

1987

Architecture of a Message-Driven ProcessorWilliam J. Dally, Linda Chao, Andrew A. Chien, Soha Hassoun, Waldemar Horwat, Jon Kaplan, Paul Song, Brian Totty, D. Scott Wills. isca 1987: 189-196