Emrah Acar - researchr alias

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Viewing Publication 1 - 27 from 27

2013

Hardware-corroborated Variability-Aware SRAM MethodologyRajiv V. Joshi, Rouwaida Kanj, S. Butt, Emrah Acar, D. Lea, D. Sciacca. vlsid 2013: 344-349 [doi]

2012

DRC-free high density layout exploration with layout morphing and patterning quality assessment, with application to SRAMAmith Singhee, Emrah Acar, Mohammad Imran Younus, Rama N. Singh, Aditya Bansal. isqed 2012: 470-476 [doi]

Spatial variation decomposition via sparse regressionWangyang Zhang, Karthik Balakrishnan, Xin Li 0001, Duane S. Boning, Emrah Acar, Frank Liu, Rob A. Rutenbar. icicdt 2012: 1-4 [doi]

2011

Abstraction and microarchitecture scaling in early-stage power modelingHans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, Richard J. Eickemeyer. hpca 2011: 394-405 [doi]

Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated CircuitsWangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A. Rutenbar, Ronald D. Blanton. tcad, 30(12):1814-1827, 2011. [doi]

2010

Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlationWangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob A. Rutenbar. iccad 2010: 47-54 [doi]

2009

Yield estimation of SRAM circuits using Virtual SRAM Fab Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das. iccad 2009: 631-636 [doi]

2007

2006

Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA)Emrah Acar, Peter Feldmann. iscas 2006: [doi]

Characterization of total chip leakage using inverse (reciprocal) gamma distributionEmrah Acar, Kanak Agarwal, Sani R. Nassif. iscas 2006: [doi]

Methods for estimating decoupling capacitance of nonswitching circuit blocksSani R. Nassif, Kanak Agarwal, Emrah Acar. iscas 2006: [doi]

2005

Leakage and Leakage Sensitivity Computation for Combinational CircuitsEmrah Acar, Anirudh Devgan, Sani R. Nassif. jolpe, 1(2):172-181, 2005. [doi]

A Waveform Independent Gate Model for Accurate Timing AnalysisPeng Li, Emrah Acar. iccd 2005: 363-365 [doi]

2003

2002

TETA: transistor-level waveform evaluation for timing analysisEmrah Acar, Florentin Dartu, Lawrence T. Pileggi. tcad, 21(5):605-616, 2002. [doi]

A Linear-Centric Simulation Framework for Parametric FluctuationsEmrah Acar, Sani R. Nassif, Lawrence T. Pileggi. date 2002: 568-575 [doi]

Time-Domain Simulation of Variational Interconnect ModelsEmrah Acar, Sani R. Nassif, Ying Liu, Lawrence T. Pileggi. isqed 2002: 419-424 [doi]

2001

Assessment of True Worst Case Circuit Performance Under Interconnect Parameter VariationsEmrah Acar, Lawrence T. Pileggi, Sani R. Nassif, Ying Liu. isqed 2001: 431-436 [doi]

1999

S2P: A Stable 2-Pole RC Delay and Coupling Noise MetricEmrah Acar, Altan Odabasioglu, Mustafa Celik, Lawrence T. Pileggi. glvlsi 1999: 60-63 [doi]

1998

Regressor based adaptive infinite impulse response filteringEmrah Acar, Orhan Arikan. icassp 1998: 1733-1736 [doi]

h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous responseTao Lin, Emrah Acar, Lawrence T. Pileggi. iccad 1998: 19-25 [doi]

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