Jarmo Takala - researchr alias

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2011

2010

2009

Programmable and Scalable Architecture for Graphics Processing UnitsCarlos S. de La Lama, Pekka JÃ¤Ã¤skelÃ¤inen, Jarmo Takala. samos 2009: 2-11 [doi]

Reducing processor energy consumption by compiler optimizationVladimír Guzma, Teemu Pitkänen, Pertti Kellomäki, Jarmo Takala. sips 2009: 63-68 [doi]

Dictionary-based program compression on customizable processor architecturesJari Heikkinen, Jarmo Takala, Henk Corporaal. mam, 33(2):139-153, 2009. [doi]

Radix-4 Recoded Multiplier on Quantum-Dot Cellular AutomataIsmo HÃ¤nninen, Jarmo Takala. samos 2009: 118-127 [doi]

Reconfigurable video decoder with transform accelerationLassi Nurmi, Perttu Salmela, Pertti Kellomäki, Pekka Jääskeläinen, Jarmo Takala. sips 2009: 81-86 [doi]

Parallel Memory Architecture for Application-Specific Instruction-Set ProcessorsTeemu PitkÃ¤nen, Jarno K. Tanskanen, Risto MÃ¤kinen, Jarmo Takala. vlsisp, 57(1):21-32, 2009. [doi]

Low-power application-specific processor for FFT computationsTeemu Pitkänen, Jarmo Takala. icassp 2009: 593-596 [doi]

SPICE Simulation of Analog Filters: A Method for Designing Digital FiltersCorneliu Rusu, Lacrimioara Grama, Jarmo Takala. eurocast 2009: 534-539 [doi]

3G Long Term Evolution Baseband Processing with Application-Specific ProcessorsPerttu Salmela, Juho Antikainen, Teemu Pitkänen, Olli Silvén, Jarmo Takala. ijdmbc, 2009, 2009. [doi]

2008

Fine-grained application-specific instruction set processor design for the K-best list sphere detector algorithmJuho Antikainen, Perttu Salmela, Olli Silvén, Markku J. Juntti, Jarmo Takala, Markus Myllylä. samos 2008: 108-115 [doi]

Introduction to the Special Issue on Embedded Computing Systems for DSPShuvra S. Bhattacharyya, Jarmo Takala, Georgi Gaydadjiev. vlsisp, 50(2):97-98, 2008. [doi]

Implementing communications systems on an SDR SoCJohn Glossner, Daniel Iancu, Mayan Moudgill, Sanjay Jinturkar, Gary Nacer, Stuart Stanley, Andrei Iancu, Hua Ye, Michael J. Schulte, Mihai Sima, Tomas Palenik, Peter Farkas, Jarmo Takala. icassp 2008: 5380-5383 [doi]

Impact of Software Bypassing on Instruction Level Parallelism and Register File TrafficVladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala. samos 2008: 23-32 [doi]

Reliability of n-Bit Nanotechnology AdderIsmo Hänninen, Jarmo Takala. isvlsi 2008: 34-39 [doi]

Arithmetic Design on Quantum-Dot Cellular Automata NanotechnologyIsmo Hänninen, Jarmo Takala. samos 2008: 43-52 [doi]

Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction SetDaniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala. samos 2008: 126-135 [doi]

Reducing Context Switch Overhead with Compiler-Assisted ThreadingPekka JÃ¤Ã¤skelÃ¤inen, Pertti KellomÃ¤ki, Jarmo Takala, Heikki Kultala, Mikael LepistÃ¶. euc 2008: 461-466 [doi]

A detection algorithm for zero-quantized DCT coefficients in JPEGJin Li, Jarmo Takala, Moncef Gabbouj, Hexin Chen. icassp 2008: 1189-1192 [doi]

Laplacian modeling of DCT coefficients for real-time encodingJin Li, Moncef Gabbouj, Jarmo Takala, Hexin Chen. icmcs 2008: 797-800 [doi]

Hybrid Modeling of Intra-DCT Coefficients for Real-Time Video EncodingJin Li, Moncef Gabbouj, Jarmo Takala. ejivp, 2008, 2008. [doi]

Complex-valued QR decomposition implementation for MIMO receiversPerttu Salmela, Adrian Burian, Harri Sorokin, Jarmo Takala. icassp 2008: 1433-1436 [doi]

A Programmable Max-Log-MAP Turbo Decoder ImplementationPerttu Salmela, Harri Sorokin, Jarmo Takala. vlsi, 2008, 2008. [doi]

Low-complexity polynomials modulo integer with linearly incremented variablePerttu Salmela, Harri Sorokin, Jarmo Takala. sips 2008: 251-256 [doi]

2007

Application-Specific Instruction Set Processor Implementation of List Sphere DetectorJuho Antikainen, Perttu Salmela, Olli Silvén, Markku J. Juntti, Jarmo Takala, Markus Myllylä. ejes, 2007, 2007. [doi]

Effects of program compressionJari Heikkinen, Jarmo Takala. jsa, 53(10):679-688, 2007. [doi]

Robust Adders Based on Quantum-Dot Cellular AutomataIsmo Hänninen, Jarmo Takala. asap 2007: 391-396 [doi]

Stride Permutation Networks for Array ProcessorsTuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala. vlsisp, 49(1):51-71, 2007. [doi]

Resource Conflict Detection in Simulation of Function Unit PipelinesPekka Jääskeläinen, Vladimír Guzma, Jarmo Takala. samos 2007: 233-240 [doi]

Low-Power Twiddle Factor Unit for FFT ComputationTeemu Pitkänen, Tero Partanen, Jarmo Takala. samos 2007: 65-74 [doi]

Memory-Based List Updating for List Sphere DecodersPerttu Salmela, Juho Antikainen, Olli SilvÃ©n, Jarmo Takala. sips 2007: 633-638 [doi]

Synthesis of DSP Architectures Using Libraries of Coarse-Grain ConfigurationsPerttu Salmela, Chung-Ching Shen, Shuvra S. Bhattacharyya, Jarmo Takala. sips 2007: 475-480 [doi]

EditorialJarmo Takala, Timo D. Hämäläinen, Andy D. Pimentel, Stamatis Vassiliadis. jsa, 53(8):465, 2007. [doi]

Embedded Digital Signal Processing SystemsJarmo Takala, Shuvra S. Bhattacharyya, Gang Qu. ejes, 2007, 2007. [doi]

Parallel Memory Architecture for TTA ProcessorJarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala. samos 2007: 273-282 [doi]

2006

Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2006), Samos, Greece, July 17-20, 2006Georgi Gaydadjiev, C. John Glossner, Jarmo Takala, Stamatis Vassiliadis, editors, IEEE, 2006.

Effects of Program CompressionJari Heikkinen, Jarmo Takala. samos 2006: 259-268 [doi]

Software Implementation of WiMAX on the Sandbridge SandBlaster PlatformDaniel Iancu, Hua Ye, Emanoil Surducan, Murugappan Senthilvelan, John Glossner, Vasile Surducan, Vladimir Kotlyar, Andrei Iancu, Gary Nacer, Jarmo Takala. samos 2006: 435-446 [doi]

Evaluation of stride permutation networksTuomas Järvinen, Perttu Salmela, Konsta Punkka, Jarmo Takala. iscas 2006: [doi]

Discrete cosine and sine transforms - regular algorithms and pipeline architecturesJari Nikara, Jarmo Takala, Jaakko Astola. sigpro, 86(2):230-249, 2006. [doi]

Low-Power, High-Performance TTA Processor for 1024-Point Fast Fourier TransformTeemu Pitkänen, Risto Mäkinen, Jari Heikkinen, Tero Partanen, Jarmo Takala. samos 2006: 227-236 [doi]

Software Pipelining Support for Transport Triggered Architecture ProcessorsPerttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala. samos 2006: 237-247 [doi]

Scalable FFT Processors and Pipelined Butterfly UnitsJarmo Takala, Konsta Punkka. vlsisp, 43(2-3):113-123, 2006. [doi]

2005

Complex Fixed-Point Matrix Inversion Using Transport Triggered ArchitectureAdrian Burian, Perttu Salmela, Jarmo Takala. asap 2005: 107-112 [doi]

Dictionary-based program compression on transport triggered architecturesJari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, Henk Corporaal. iscas 2005: 1122-1125 [doi]

Embedded Computer Systems: Architectures, Modeling, and Simulation 5th International Workshop, SAMOS 2005, Samos, Greece, July 18-20, 2005, ProceedingsTimo D. Hämäläinen, Andy D. Pimentel, Jarmo Takala, Stamatis Vassiliadis, editors, Volume 3553 of Lecture Notes in Computer Science, Springer, 2005.

Systematic approach for path metric access in Viterbi decodersTuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala. tcom, 53(5):755-759, 2005. [doi]

Hardware Cost Estimation for Application-Specific Processor DesignTeemu Pitkänen, Tommi Rantanen, Andrea G. M. Cilio, Jarmo Takala. samos 2005: 212-221 [doi]

256-State Rate 1/2 Viterbi Decoder on TTA ProcessorPerttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala. asap 2005: 370-378 [doi]

2004

VLSI-efficient implementation of full adder-based median filterAdrian Burian, Jarmo Takala. iscas 2004: 817-820

Stride Permutation Networks for Array ProcessorsTuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala. asap 2004: 376-386 [doi]

Register-Based Permutation Networks for Stride PermutationsTuomas Järvinen, Jarmo Takala. samos 2004: 108-117 [doi]

Multiple-symbol parallel decoding for variable length codesJari Nikara, Stamatis Vassiliadis, Jarmo Takala, Petri Liuha. tvlsi, 12(7):676-685, 2004. [doi]

Scalable FFT Processors and Pipelined Butterfly UnitsJarmo Takala, Konsta Punkka. samos 2004: 373-382 [doi]

A low-power fractional decimator architecture for an IF-sampling dual-mode receiverRiku Uusikartano, Jarmo Takala. iscas 2004: 589-592 [doi]

Direct versus iterative methods for fixed-point implementation of matrix inversionMikko Ylinen, Adrian Burian, Jarmo Takala. iscas 2004: 225-228 [doi]

2003

A recurrent neural network for 1-D phase retrievalAdrian Burian, Jarmo Takala. iscas 2003: 729-732 [doi]

Parallel iterations for recursive median filterAdrian Burian, Jarmo Takala, Marina Dana Topa. iscas 2003: 488-491 [doi]

Evaluating Template-Based Instruction Compression on Transport Triggered ArchitecturesJari Heikkinen, Tommi Rantanen, Andrea G. M. Cilio, Jarmo Takala, Henk Corporaal. iwsoc 2003: 192-195 [doi]

In-Place Storage of Path Metrics in Viterbi DecodersTuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala. vlsi 2003: 295-300

FPGA-Based Variable Length DecodersJari Nikara, Stamatis Vassiliadis, Jarmo Takala, Petri Liuha. vlsi 2003: 437-441

Mapping Action Systems to Hardware DescriptionsJussi Nykänen, Harri Klapuri, Jarmo Takala. pdpta 2003: 1407-1412

Conflict-free parallel memory access scheme for FFT processorsJarmo Takala, Tuomas Järvinen, Harri Sorokin. iscas 2003: 524-527 [doi]

2002

Parallel Multiple-Symbol Variable-Length DecodingJari Nikara, Stamatis Vassiliadis, Jarmo Takala, Mihai Sima, Petri Liuha. iccd 2002: 126-131 [doi]

2001

Implementing reactive closed-system specificationsHarri Klapuri, Jarmo Takala, Jukka Saarinen. jnca, 24(2):101-123, 2001. [doi]

Pipeline architecture for DCT/IDCTJari Nikara, Jarmo Takala, David Akopian, Jukka Saarinen. iscas 2001: 902-905 [doi]

1999

Safety, liveness and real-time in embedded system designHarri Klapuri, Jarmo Takala, Jukka Saarinen. jnca, 22(2):69-89, 1999. [doi]

Distance Transform Algorithm for Bit-Serial SIMD ArchitecturesJarmo Takala, Jouko O. Viitanen. cviu, 74(2):150-161, 1999. [doi]

1994

SIMD Parallel Calculation of Distance TransformationsJouko O. Viitanen, Jarmo Takala. icip 1994: 645-649