Junji Yamamoto - researchr alias

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Viewing Publication 1 - 17 from 17

2017

Thermal Sensor Circuit Using Thermography for Temperature-Controlled Laser HyperthermiaShinsuke Nomura, Masashi Arake, Yuji Morimoto, Hironori Tsujimoto, Hiromi Miyazaki, Daizoh Saitoh, Nariyoshi Shinomiya, Kazuo Hase, Junji Yamamoto, Hideki Ueno. js, 2017, 2017. [doi]

2013

Study on supporting technology for operational procedure design of IT systems in cloud-era datacentersHiroaki Shikano, Machiko Asaie, Junji Yamamoto, Tatsuya Saito, Shunsuke Ota, Keitaro Uehara. SAC 2013: 405-407 [doi]

2008

Platform for Load Balancing and Throughput Enhancement with Cognitive RadioSeishi Hanaoka, Junji Yamamoto, Masashi Yano. ieicet, 91-B(8):2501-2508, 2008. [doi]

2007

Simulation and Basic Experiment of Inter Radio System Handover for Cognitive RadioSeishi Hanaoka, Junji Yamamoto, Koji Wakayama, Satoshi Yoshizawa, Tetsuhiko Hirata. pimrc 2007: 1-5 [doi]

Martini: A Network Interface Controller Chip for High Performance Computing with Distributed PCsKonosuke Watanabe, Tomohiro Otsuka, Junichiro Tsuchiya, Hiroaki Nishi, Junji Yamamoto, Noboru Tanabe, Tomohiro Kudoh, Hideharu Amano. tpds, 18(9):1282-1295, 2007. [doi]

2006

Integration of Mobile IPv6 into Mobile Ad-Hoc Network SystemsMonden Kazuya, Satoh Hiroki, Junji Yamamoto, Shomura Yusuke, Atsushi Shimizu, Masato Hayashi, Susumu Matsui, Satoshi Yoshizawa. ifip6 2006: 229-242 [doi]

2003

2002

Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM SlotNoboru Tanabe, Yoshihiro Hamada, Hironori Nakajo, Hideki Imashiro, Junji Yamamoto, Tomohiro Kudoh, Hideharu Amano. parelec 2002: 9-14 [doi]

Low Latency High Bandwidth Message Transfer Mechanisms for a Network Interface Plugged into a Memory SlotNoboru Tanabe, Junji Yamamoto, Hiroaki Nishi, Tomohiro Kudoh, Yoshihiro Hamada, Hironori Nakajo, Hideharu Amano. cluster, 5(1):7-17, 2002.

2001

RHiNET-3/SW: an 80-Gbit/s high-speed network switch for distributed parallel computingShinji Nishimura, Tomohiro Kudoh, Hiroaki Nishi, Junji Yamamoto, R. Ueno, Katsuyoshi Harasawa, Shuji Fukuda, Yasutaka Shikichi, Shigeto Akutsu, Koji Tasho, Hideharu Amano. hoti 2001: 119-123 [doi]

2000

1999

Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architectureJunji Yamamoto, Takashi Fujiwara, T. Komeda, Takayuki Kamei, Toshihiro Hanawa, Hideharu Amano. pc, 25(9):1081-1103, 1999.

1997

Shared vs. Snoop: Evaluation of Cache Structure for Single-Chip MultiprocessorsToru Kisuki, Masaki Wakabayashi, Junji Yamamoto, Keisuke Inoue, Hideharu Amano. europar 1997: 793-797

1995

A Preprocessing System of the EULASH: An Environment for Efficient use of Multiprocessors with Local MemoryJunji Yamamoto, D. Hattori, Jun-ichi Yamato, T. Tokuyoshi, Y. Yamaguchi, Hideharu Amano. pdpcs 1995: 68-71

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