Kimmo Kuusilinna - researchr alias

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Viewing Publication 1 - 39 from 39

2012

Towards real-time applications in mobile web browsersEero Aho, Kimmo Kuusilinna, Tomi Aarnio, Janne Pietiainen, Jari Nikara. estimedia 2012: 57-66 [doi]

2009

2008

A Parallel Memory System for Variable Block-Size Motion Estimation AlgorithmsJarno Vanne, Eero Aho, Timo D. Hämäläinen, Kimmo Kuusilinna. tcsv, 18(4):538-543, 2008. [doi]

2007

Configurable implementation of parallel memory based real-time video downscalerEero Aho, Jarno Vanne, Timo D. Hämäläinen, Kimmo Kuusilinna. mam, 31(5):283-292, 2007. [doi]

Benchmarking mesh and hierarchical bus networks in system-on-chip contextErno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen. jsa, 53(8):477-488, 2007. [doi]

2006

2005

2004

Address Computation in Configurable Parallel Memory ArchitectureEero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo D. Hämäläinen. ieicet, 87-D(7):1674-1681, 2004. [doi]

A Communication-Centric Design Flow for HIBI-Based SoCsTero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen. samos 2004: 474-483 [doi]

Describing MIMO designs for rapid prototyping in the BEE environmentKimmo Kuusilinna, Chen Chang, Hans-Martin Blüthgen, Danijela Cabric, Brian C. Richards, Robert W. Brodersen. eusipco 2004: 693-696 [doi]

Practical distributed simulation of a network of wireless terminalsJouni Riihimäki, Petri Kukkala, Erno Salminen, Marko Hännikäinen, Kimmo Kuusilinna, Timo D. Hämäläinen. issoc 2004: 49-52 [doi]

HIBI v.2 Communication Network for System-on-ChipErno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen. samos 2004: 413-422 [doi]

Comparison of hardware IP components for system-on-chipErno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen. issoc 2004: 69-73 [doi]

2003

Implementation of BEE: a real-time large-scale hardware emulation engineChen Chang, Kimmo Kuusilinna, Brian C. Richards, Robert W. Brodersen. fpga 2003: 91-99 [doi]

Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation EnvironmentChen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic. rsp 2003: 148 [doi]

Using a communication generator in SoC architecture explorationTero Kangas, Jouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen. issoc 2003: 105-108 [doi]

Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless ApplicationsKimmo Kuusilinna, Chen Chang, M. Josephine Ammer, Brian C. Richards, Robert W. Brodersen. ejasp, 2003(6):502-513, 2003. [doi]

Comparison of synthesized bus and crossbar interconnection architecturesVesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen. iscas 2003: 433-436 [doi]

Distributing SoC Simulations over a Network of ComputersJouni Riihimäki, Väinö Helminen, Kimmo Kuusilinna, Timo D. Hämäläinen. dsdm 2003: 447-450 [doi]

2002

TDMA-based communication scheduling in system-on-chip video encoderTero Kangas, Kimmo Kuusilinna, Timo Hämäläinen. iscas 2002: 369-372 [doi]

Configurable parallel memory architecture for multimedia computersKimmo Kuusilinna, Jarno K. Tanskanen, Timo HÃ¤mÃ¤lÃ¤inen, Jarkko Niittylahti. jsa, 47(14-15):1089-1115, 2002. [doi]

Optimizing finite state machines for system-on-chip communicationVesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen. iscas 2002: 485-488 [doi]

Interconnection scheme for continuous-media systems-on-a-chipVesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen. mam, 26(3):123-138, 2002. [doi]

Parameter optimization tool for enhancing on-chip network performanceJouni Riihimäki, Erno Salminen, Kimmo Kuusilinna, Timo Hämäläinen. iscas 2002: 61-64 [doi]

Enhanced Configurable Parallel Memory ArchitectureJarno Vanne, Eero Aho, Kimmo Kuusilinna, Timo D. Hämäläinen. dsdm 2002: 28-37 [doi]

2001

Interfacing multiple processors in a system-on-chip video encoderErno Salminen, Timo D. Hämäläinen, Tero Kangas, Kimmo Kuusilinna, Jukka Saarinen. iscas 2001: 478-481 [doi]

2000

Reuseable interface in multimedia hardware environmentVesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen, Tero Kangas, Jukka Saarinen. eusipco 2000: 1-4 [doi]

1999

Reconfiguration Mechanism for an IP Block Based InterconnectionKimmo Kuusilinna, Pasi Liimatainen, Timo Hämäläinen, Jukka Saarinen. euromicro 1999: 1042-1045 [doi]

Practical VHDL optimization for timing critical FPGA applicationsKimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen. mam, 23(8-9):459-469, 1999. [doi]

Field programmable gate array-based PCI interface for a coprocessor systemKimmo Kuusilinna, Timo Hämäläinen, Jukka Saarinen. mam, 22(7):373-388, 1999. [doi]

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Publications by 'Kimmo Kuusilinna'

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2012

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2007

2006

2005

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2003

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2001

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1999

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