Kwangok Jeong - researchr alias

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Viewing Publication 1 - 19 from 19

2022

Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to PostsiliconJeongwoo Heo, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyumyung Choi. tcad, 41(6):1929-1942, 2022. [doi]

2020

SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltageTaehwan Kim 0007, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyu-Myung Choi. integration, 74:81-92, 2020. [doi]

Synthesis of Hardware Performance Monitoring and Prediction Flow Adapting to Near-Threshold Computing and Advanced Process NodesJeongwoo Heo, Kwangok Jeong, Taewhan Kim, Kyu-Myung Choi. aspdac 2020: 139-144 [doi]

2019

SRAM On-Chip Monitoring Methodology for Energy Efficient Memory Operation at Near Threshold VoltageTaehwan Kim 0007, Kwangok Jeong, Taewhan Kim, Kyu-Myung Choi. isvlsi 2019: 146-151 [doi]

2012

MAPG: Memory access power gatingKwangok Jeong, Andrew B. Kahng, Seokhyeong Kang, Tajana Simunic Rosing, Richard D. Strong. date 2012: 1054-1059 [doi]

2011

Stability and scalability in global routingSung Kyu Han, Kwangok Jeong, Andrew B. Kahng, Jingwei Lu. slip 2011: 1-6 [doi]

Toward PDN resource estimation: A law of general power densityKwangok Jeong, Andrew B. Kahng. slip 2011: 1-6 [doi]

2010

Timing Yield-Aware Color Reassignment and Detailed Placement Perturbation for Bimodal CD Distribution in Double Patterning LithographyMohit Gupta, Kwangok Jeong, Andrew B. Kahng. tcad, 29(8):1229-1242, 2010. [doi]

Accurate Machine-Learning-Based On-Chip Router ModelingKwangok Jeong, Andrew B. Kahng, B. Lin, Kambiz Samadi. esl, 2(3):62-66, 2010. [doi]

Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage PowerKwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao. tcad, 29(7):1070-1082, 2010. [doi]

Toward effective utilization of timing exceptions in design optimizationKwangok Jeong, Andrew B. Kahng, Seokhyeong Kang. isqed 2010: 54-61 [doi]

Assessing chip-level impact of double patterning lithographyKwangok Jeong, Andrew B. Kahng, Rasit Onur Topaloglu. isqed 2010: 122-130 [doi]

Methodology from chaos in IC implementationKwangok Jeong, Andrew B. Kahng. isqed 2010: 885-892 [doi]

2009

2008

Quantified Impacts of Guardband Reduction on Design Process OutcomesKwangok Jeong, Andrew B. Kahng, Kambiz Samadi. isqed 2008: 790-797 [doi]

Dose map and placement co-optimization for timing yield enhancement and leakage power reductionKwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao. dac 2008: 516-521 [doi]

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