Masahiro Koga - researchr alias

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Viewing Publication 1 - 4 from 4

2012

An Easily Testable Routing Architecture and Prototype ChipKazuki Inoue, Masahiro Koga, Motoki Amagasaki, Masahiro Iida, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi. ieicet, 95-D(2):303-313, 2012. [doi]

2011

A Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM CellsMasahiro Iida, Masahiro Koga, Kazuki Inoue, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi. ieicet, 94-C(4):548-556, 2011. [doi]

2010

First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM CellsMasahiro Koga, Masahiro Iida, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi. fpl 2010: 298-303 [doi]

2008

An Embedded Reconfigurable IP Core with Variable Grain Logic Cell ArchitectureMotoki Amagasaki, Ryoichi Yamaguchi, Masahiro Koga, Masahiro Iida, Toshinori Sueyoshi. ijrc, 2008, 2008. [doi]

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