Matteo Monchiero - researchr alias

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Viewing Publication 1 - 33 from 33

2013

Capturing vulnerability variations for register filesJavier Carretero, Enric Herrero, Matteo Monchiero, Tanausú Ramírez, Xavier Vera. date 2013: 1468-1473 [doi]

2011

2009

COTSon: infrastructure for full system simulationEduardo Argollo, Ayose FalcÃ³n, Paolo Faraboschi, Matteo Monchiero, Daniel Ortega. sigops, 43(1):52-61, 2009. [doi]

Power Management of Datacenter Workloads Using Per-Core Power GatingJacob Leverich, Matteo Monchiero, Vanish Talwar, Parthasarathy Ranganathan, Christos Kozyrakis. cal, 8(2):48-51, 2009. [doi]

Using Coherence Information and Decay Techniques to Optimize L2 Cache Leakage in CMPsMatteo Monchiero, Ramon Canal, Antonio GonzÃ¡lez. icpp 2009: 1-8 [doi]

How to simulate 1000 coresMatteo Monchiero, Jung Ho Ahn, Ayose Falcón, Daniel Ortega, Paolo Faraboschi. sigarch, 37(2):10-19, 2009. [doi]

A multiprocessor self-reconfigurable JPEG2000 encoderAntonino Tumeo, Simone Borgio, Davide Bosisio, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. ipps 2009: 1-8 [doi]

Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platformAntonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. aspdac 2009: 317-322 [doi]

2008

Power/Performance/Thermal Design-Space Exploration for Multicore ArchitecturesMatteo Monchiero, Ramon Canal, Antonio González. tpds, 19(5):666-681, 2008. [doi]

A Modular Approach to Model Heterogeneous MPSoC at Cycle LevelMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa. dsd 2008: 158-164 [doi]

A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory HierarchiesShyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi. isca 2008: 51-62 [doi]

A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive ApplicationsAntonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. date 2008: 1039-1044 [doi]

Lightweight DMA management mechanisms for multiprocessors on FPGAAntonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. asap 2008: 275-280 [doi]

Corona: System Implications of Emerging Nanophotonic TechnologyDana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn. isca 2008: 153-164 [doi]

2007

Exploration of distributed shared memory architectures for NoC-based multiprocessorsMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa. jsa, 53(10):719-732, 2007. [doi]

A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCsAntonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. isvlsi 2007: 331-336 [doi]

An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsbAntonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. isvlsi 2007: 449-450 [doi]

A Self-Reconfigurable Implementation of the JPEG EncoderAntonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. asap 2007: 24-29 [doi]

A design kit for a fully working shared memory multiprocessor on FPGAAntonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. glvlsi 2007: 219-222 [doi]

An Interrupt Controller for FPGA-based MultiprocessorsAntonino Tumeo, Marco Branca, Lorenzo Camerini, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto. samos 2007: 82-87 [doi]

2006

Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGASimone Borgio, Davide Bosisio, Fabrizio Ferrandi, Matteo Monchiero, Marco D. Santambrogio, Donatella Sciuto, Antonino Tumeo. samos 2006: 107-114 [doi]

Design space exploration for multicore architectures: a power/performance/thermal viewMatteo Monchiero, Ramon Canal, Antonio González. ics 2006: 177-186 [doi]

Exploration of Distributed Shared Memory Architectures for NoC-based MultiprocessorsMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa. samos 2006: 144-151 [doi]

Power/performance hardware optimization for synchronization intensive applications in MPSoCsMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa. date 2006: 606-611 [doi]

An efficient synchronization technique for multiprocessor systems on-chipMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa. sigarch, 34(1):33-40, 2006. [doi]

Efficient Synchronization for Embedded On-Chip MultiprocessorsMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa. tvlsi, 14(10):1049-1062, 2006. [doi]

2005

2004

Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processorsMatteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon. glvlsi 2004: 440-443 [doi]

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2004

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