Nicolas Demassieux - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 18 from 18

1998

Decoding of constellations matched to the Rayleigh fading channelEmmanuel Boutillon, Jose Maria Uruñuela-Martinez, Nicolas Demassieux. adt, 53(1-2):28-38, 1998. [doi]

1996

A Generic Smart Sensor Model for Real-time Distributed Data Acquisition SystemsAmal Zerrouki, Jacques Ehrlich, Nicolas Demassieux, Denis Roux, Arnaud Galisson. pdpta 1996: 329-340

1995

VLSI architectures for video compression-a surveyPeter Pirsch, Nicolas Demassieux, Winfred Gehrke. pieee, 83(2):220-246, 1995. [doi]

1994

Optimization of Real-Time VLSI Architectures for Distributed Arithmetic-Based Algorithms: Application to HDTV FiltersKamal Nourji, Nicolas Demassieux. iscas 1994: 223-226

Optimal VLSI architecture for distributed arithmetic-based algorithmsKamal Nourji, Nicolas Demassieux. icassp 1994: 509-512 [doi]

1993

Memory-I/O tradeoff and VLSI implementation of lapped transforms for image processingKamal Nourji, Nicolas Demassieux. icassp 1993: 393-396 [doi]

1992

From image coding to multimedia: Algorithms and architectures for a revolutionNicolas Demassieux. jsa, 35(1-5):3, 1992. [doi]

1991

A real-time discrete cosine transform chipNicolas Demassieux, Francis Jutand. dsp, 1(1):6-14, 1991. [doi]

A versatile architecture for VLSI implementation of the Viterbi algorithmB.-K. Min, Nicolas Demassieux. icassp 1991: 1101-1104 [doi]

1990

A new VLSI architecture for large kernel real time convolutionFrancis Jutand, Nicolas Demassieux, A. Artieri. icassp 1990: 921-924 [doi]

Real-time VLSI architecture for geometric image transformationsMin Zhao, Jean Gobert, Olivier Schirvanian, Nicolas Demassieux. vcip 1990: [doi]

1988

A VLSI architecture for real-time image convolution with large symmetric kernelsNicolas Demassieux, Francis Jutand, Marc Bernard, Christophe Joanblanq. icassp 1988: 1961-1964 [doi]

A single chip VLSI architecture for a real time stereo vision processorFrancis Jutand, Serge Maginot, Nicolas Demassieux, Henri Maître. icassp 1988: 1965-1968 [doi]

1987

An optimized VLSI architecture for a multiformat discrete cosine transformNicolas Demassieux, Gilles Concordel, Jean-Pierre Durandeau, Francis Jutand. icassp 1987: 547-550 [doi]

1986

A single chip video rate 16×16 discrete cosine transformFrancis Jutand, Nicolas Demassieux, Gilles Concordel, Jacques Guichard, Eric Cassimatis. icassp 1986: 805-808 [doi]

VDP : A versatile high performance vector distance processorFrancis Jutand, Nicolas Demassieux, Dominique Vicard. icassp 1986: 369-372 [doi]

1985

VLSI Architecture for a one chip video median filterNicolas Demassieux, Francis Jutand, Marc Saint-Paul, Michel Dana. icassp 1985: 1001-1004 [doi]

1984

VLSI architectures for dynamic time warping using systolic arraysFrancis Jutand, Nicolas Demassieux, D. Vicard, Gérard Chollet. icassp 1984: 778-781 [doi]

Sign in or sign up to see more results.

runs on WebDSL