Noriyoshi Yoshida - researchr alias

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2007

A Deterministic Algorithm for Finding All Minimum k-Way CutsYoko Kamidoi, Noriyoshi Yoshida, Hiroshi Nagamochi. siamcomp, 36(5):1329-1341, 2007. [doi]

2006

A Decision Method of Attribute Importance for Classification by Outlier DetectionTomotake Nakamura, Yoko Kamidoi, Shin ichi Wakabayashi, Noriyoshi Yoshida. icde 2006: 120 [doi]

Scheduling support hardware for multiprocessor system and its evaluationsTakahiro Sasaki, Tetsuo Hironaka, Naoki Nishimura, Noriyoshi Yoshida. scjapan, 37(2):79-95, 2006. [doi]

2005

Feature Extraction of Clusters Based on FlexDiceTomotake Nakamura, Yoko Kamidoi, Shin ichi Wakabayashi, Noriyoshi Yoshida. icde 2005: 1126 [doi]

A Clustering Method Using an Irregular Size Cell GraphTomotake Nakamura, Yoko Kamidoi, Shin ichi Wakabayashi, Noriyoshi Yoshida. ride 2005: 19-26 [doi]

2002

A Divide-and-Conquer Approach to the Minimum k-Way Cut ProblemYoko Kamidoi, Shin ichi Wakabayashi, Noriyoshi Yoshida. algorithmica, 32(2):262-276, 2002. [doi]

A Generalized Execution Model for Programming on Reconfigurable Architectures and an Architecture Supporting the ModelKazuya Tanigawa, Tetsuo Hironaka, Akira Kojima, Noriyoshi Yoshida. fpl 2002: 434-443 [doi]

1999

Diagonal Examples for Design Space Exploration in an Educational Environment CITY-1Ryuichi Takahashi, Noriyoshi Yoshida. mse 1999: 71-73 [doi]

1997

A timing-driven placement algorithm with the Elmore delay model for row-based VLSIsTetsushi Koide, Shin ichi Wakabayashi, Mitsuhiro Ono, Yutaka Nishimaru, Noriyoshi Yoshida. integration, 24(1):53-77, 1997. [doi]

1996

A three-layer over-the-cell multi-channel router for a new cell modelTetsushi Koide, Masahiro Tsuchiya, Shin ichi Wakabayashi, Noriyoshi Yoshida. integration, 21(3):171-189, 1996. [doi]

Pin assignment with global routing for VLSI building block layoutTetsushi Koide, Shin ichi Wakabayashi, Noriyoshi Yoshida. tcad, 15(12):1575-1583, 1996. [doi]

1995

1994

A Systolic Graph Partitioning Algorithm for VLSI DesignShin ichi Wakabayashi, Kazunori Isomoto, Tetsushi Koide, Noriyoshi Yoshida. iscas 1994: 225-228

On Three-Way Graph PartitioningYoko Kamidoi, Shin ichi Wakabayashi, Noriyoshi Yoshida. iscas 1994: 173-176

A Floorplanning Method with Topological Constraint ManipulationTetsushi Koide, Yoshinori Katsura, Katsumi Yamatani, Shin ichi Wakabayashi, Noriyoshi Yoshida. iscas 1994: 165-168

1993

Gate Array Placement Based on Mincut, Partitioning with Path Delay ConstraintsShin ichi Wakabayashi, Hiroshi Kusumoto, Hideki Mishima, Tetsushi Koide, Noriyoshi Yoshida. iscas 1993: 2059-2062

1989

A Meeting Scheduler for Office AutomationKazuo Sugihara, Tohru Kikuno, Noriyoshi Yoshida. TSE, 15(10):1141-1146, 1989. [doi]

1987

A Heuristic Algorithm for Gate Assignment in One-Dimensional Array ApproachTakashi Fujii, Hideya Horikawa, Tohru Kikuno, Noriyoshi Yoshida. tcad, 6(2):159-164, 1987. [doi]

1984

A Distributed Algorithm for Deadlock Detection and ResolutionKazuo Sugihara, Tohru Kikuno, Noriyoshi Yoshida, Masanobu Ogata. srds 1984: 169-176

A Semantic Approach to Usability in Relational Database SystemsKazuo Sugihara, Jun ichi Miyao, Tohru Kikuno, Noriyoshi Yoshida. icde 1984: 203-210 [doi]

1973

A Method of Synthesis and Decomposition of Autonomous Linear Sequential CircuitsTadashi Ae, Noriyoshi Yoshida. iandc, 23(4):382-392, November 1973.