Prabhakar Kudva - researchr alias

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2011

Exponent monitoring for low-cost concurrent error detection in FPU control logicMichail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer. vts 2011: 235-240 [doi]

Error Tolerance in Server Class ProcessorsJude A. Rivers, Meeta Sharma Gupta, Jeonghee Shin, Prabhakar Kudva, Pradip Bose. tcad, 30(7):945-959, 2011. [doi]

2010

Power-efficient, reliable microprocessor architectures: modeling and design methodsPradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, Victor V. Zyuban. glvlsi 2010: 299-304 [doi]

2009

Reliability Challenges and System Performance at the Architecture LevelJude A. Rivers, Prabhakar Kudva. dt, 26(6):62-73, 2009. [doi]

2008

2004

Implicit enumeration of structural changes in circuit optimizationVictor N. Kravets, Prabhakar Kudva. dac 2004: 438-441 [doi]

2003

Physical synthesis methodology for high performance microprocessorsYiu-Hing Chan, Prabhakar Kudva, Lisa B. Lacey, Gregory A. Northrop, Thomas E. Rosser. dac 2003: 696-701 [doi]

Understanding metrics in logic synthesis for routability enhancementVictor N. Kravets, Prabhakar Kudva. slip 2003: 3-5 [doi]

Measurements for structural logic synthesis optimizationsPrabhakar Kudva, Andrew Sullivan, William E. Dougherty. tcad, 22(6):665-674, 2003. [doi]

2002

2001

Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI designW. Chen, Wei Hwang, Prabhakar Kudva, George Gristede, Stephen V. Kosonocky, Rajiv V. Joshi. islped 2001: 263-266 [doi]

2000

1999

Performance Driven Optimization of Network Length in Physical PlacementWilm E. Donath, Prabhakar Kudva, Lakshmi N. Reddy. iccd 1999: 258-265 [doi]

Peephole optimization of asynchronous macromodule networksGanesh Gopalakrishnan, Prabhakar Kudva, Erik Brunvand. tvlsi, 7(1):30-37, 1999. [doi]

1998

Gate-size selection for standard cell librariesFrederik Beeftink, Prabhakar Kudva, David S. Kung, Leon Stok. iccad 1998: 545-550 [doi]

1997

Asynchronous Transpose-Matrix ArchitecturesJosé A. Tierno, Prabhakar Kudva. iccd 1997: 423-428

1996

Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input ChangesPrabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson, Steven M. Nowick. dac 1996: 77-82 [doi]

A Technique for Synthesizing Distributed Burst-mode CircuitsPrabhakar Kudva, Ganesh Gopalakrishnan, Hans M. Jacobson. dac 1996: 67-70 [doi]

1994

Peephole Optimization of Asynchronous Macromodule NetworksGanesh Gopalakrishnan, Prabhakar Kudva, Erik Brunvand. iccd 1994: 442-446

Performance Analysis and Optimization of Asynchronous CircuitsPrabhakar Kudva, Ganesh Gopalakrishnan, Erik Brunvand, Venkatesh Akella. iccd 1994: 221-224

1992

Towards a Verification Technique for Large Synchronous CircuitsPrabhat Jain, Prabhakar Kudva, Ganesh Gopalakrishnan. cav 1993: 109-122