Ralph H. J. M. Otten - researchr alias

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2006

Statistical Timing for Parametric Yield Prediction of Digital Integrated CircuitsJochen A. G. Jess, K. Kalafala, Srinath R. Naidu, Ralph H. J. M. Otten, Chandramouli Visweswariah. tcad, 25(11):2376-2392, 2006. [doi]

2004

Statistically Aware Buffer PlanningGiuseppe S. Garcea, N. P. van der Meijs, Kees-Jan van der Kolk, Ralph H. J. M. Otten. date 2004: 1402-1403 [doi]

2003

2002

Design Automation for Deepsubmicron: Present and FutureRalph H. J. M. Otten, Raul Camposano, Patrick Groeneveld. date 2002: 650-659 [doi]

Shifts in INTEGRATION: 20 years of VLSI designRalph H. J. M. Otten. integration, 32(1-2):1-4, 2002. [doi]

2001

Are wires plannable?Ralph H. J. M. Otten, Giuseppe S. Garcea. slip 2001: 59-66 [doi]

2000

1999

A Novel VLSI Layout Fabric for Deep Sub-Micron ApplicationsSunil P. Khatri, Amit Mehrotra, Robert K. Brayton, Ralph H. J. M. Otten, Alberto L. Sangiovanni-Vincentelli. dac 1999: 491-496 [doi]

1998

Constraints Space Management for the Layout of Analog IC sBogdan G. Arsintescu, Ralph H. J. M. Otten. date 1998: 971-972 [doi]

Planning for PerformanceRalph H. J. M. Otten, Robert K. Brayton. dac 1998: 122-127 [doi]

Global wires: harmful?Ralph H. J. M. Otten. ispd 1998: 104-109 [doi]

1997

Novel Simulation of Deep-Submicron MOSFET CircuitsSerban Bruma, Ralph H. J. M. Otten. iccd 1997: 62-67

1996

Embedded tutorial: Speed - new paradigms in design for performanceRalph H. J. M. Otten, Lukas P. P. P. van Ginneken, Narendra V. Shenoy. iccad 1996: 700 [doi]

1995

Retiming Synchronous Circuitry with Imprecise DelaysIreneusz Karkowski, Ralph H. J. M. Otten. dac 1995: 322-326 [doi]

1990

Optimal slicing of plane point placementsLukas P. P. P. van Ginneken, Ralph H. J. M. Otten. eurodac 1990: 322-326 [doi]

1989

Conflict-free channel definition in building-block layoutHong Cai, Ralph H. J. M. Otten. tcad, 8(9):981-988, 1989. [doi]