Reza Hashemian - researchr alias

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Viewing Publication 1 - 36 from 36

2024

Extended "A Comprehensive and Unified Procedure for Symbolic Analysis of Analog Circuits"Reza Hashemian. tcasII, 71(2):503-507, February 2024. [doi]

2022

A Comprehensive and Unified Procedure for Symbolic Analysis of Analog CircuitsReza Hashemian. tcasI, 69(7):2819-2831, 2022. [doi]

Quick Access to Circuit Transfer Functions via NAM Determinant/Cofactors Using UaL TechniqueReza Hashemian. tcasII, 69(3):689-693, 2022. [doi]

2021

Application of Nullors in Symbolic Single Port Transfer Functions Using Admittance MethodReza Hashemian. iscas 2021: 1-5 [doi]

2020

UaL Decomposition, an Alternative to the LU Factorization of MNA MatricesReza Hashemian. tcasII, 67-II(4):630-634, 2020. [doi]

s-Expanded Transfer Function using UaL Decomposition with Convolution & DeconvolutionReza Hashemian. iscas 2020: 1-5 [doi]

Constructing Circuit Transfer Functions directly from the State Equations, Using ConvolutionsReza Hashemian. eit 2020: 265-270 [doi]

2019

Design of Analog Circuits for Continuously Changing Constraints Using Fixator Norator PairsReza Hashemian. mwscas 2019: 658-661 [doi]

2018

2017

Identifying and 3D Displaying Poles and Zeros in Analog Circuit Transfer Functions: Bode SurfacesReza Hashemian, Mounika Vanga, Mahmoud Rahat. cssp, 36(6):2473-2485, 2017. [doi]

Nullors in amplifier design for bandwidth using multiple feedbacksReza Hashemian. ccece 2017: 1-6 [doi]

2016

Finding poles and zeros in an analog circuit directly from its conductance matrix using eigenvaluesReza Hashemian. cee, 56:96-108, 2016. [doi]

Application of nullors in designing analog circuits for bandwidthReza Hashemian. eit 2016: 351-356 [doi]

RC and RL to LC circuit conversion, and its application in poles and zeros identificationReza Hashemian. icecsys 2016: 205-208 [doi]

2015

S-plane bode plots - identifying poles and zeros in a circuit transfer functionReza Hashemian. lascas 2015: 1-4 [doi]

Identification and extraction of all real axis poles and zeros in RC and RL circuitsReza Hashemian. eit 2015: 397-403 [doi]

2014

Fixator-Norator Pairs Versus Direct Analytical Tools in Performing Analog Circuit DesignsReza Hashemian. tcas, 61(8):569-573, 2014. [doi]

Extraction of Poles and Zeros of an RC Circuit With Roots on the Real AxisReza Hashemian. tcas, 61(8):624-628, 2014. [doi]

vLab, a high speed multi-accesses parallel processing remote laboratory access for FPGA design technologyKamran Ravanasa, Reza Hashemian. eit 2014: 377-381 [doi]

2012

Application of Fixator-Norator Pairs in Designing Active Loads and Current Mirrors in Analog Integrated CircuitsReza Hashemian. tvlsi, 20(12):2220-2231, 2012. [doi]

2010

Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits DesignsReza Hashemian. vlsi, 2010, 2010. [doi]

2008

Use of local biasing in designing analog integrated circuitsReza Hashemian. eit 2008: 123-127 [doi]

2007

FPGA e-Lab, a Technique to Remote Access a Laboratory to Design and TestReza Hashemian, Jason Riddley. mse 2007: 139-140 [doi]

2006

Designing Analog Circuits with Reduced Biasing PowerReza Hashemian. icecsys 2006: 1069-1072 [doi]

2004

Condensed table of Huffman coding, a new approach to efficient decodingReza Hashemian. tcom, 52(1):6-8, 2004. [doi]

A Hybrid Number System And Its Application In FPGA-DSP TechnologyReza Hashemian, Bipin Sreedharan. itcc 2004: 342-346 [doi]

2003

Direct Huffman Coding And Decoding Using The Table Of Code-LengthsReza Hashemian. itcc 2003: 237 [doi]

1995

Memory efficient and high-speed search Huffman codingReza Hashemian. tcom, 43(10):2576-2581, 1995. [doi]

1994

Design of a 54-bit adder using a modified Manchester carry chainReza Hashemian. glvlsi 1994: 204-207 [doi]

1993

High speed search and memory efficient Huffman codingReza Hashemian. iscas 1993: 287-290

1992

An alternative algorithm for high speed multiplication and addition using growing techniqueReza Hashemian. glvlsi 1992: 124-129 [doi]

1990

Square Rooting Algorithms for Integer and Floatingg-Point NumbersReza Hashemian. TC, 39(8):1025-1029, 1990.

Parallel Addition Using Pipeline StructureReza Hashemian. icpp 1990: 595-596

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