Tung-Chien Chen - researchr alias

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2011

Power estimation scheme for lowpower oriented biomedical SoC extended to very deep submicron technologyHong-Hui Chen, Tung-Chien Chen, Cheng-Yi Chiang, Liang-Gee Chen. icassp 2011: 749-752 [doi]

Design and implementation of cubic spline interpolation for spike sorting microsystemsTung-Chien Chen, Yun-Yu Chen, Tsung-Chuan Ma, Liang-Gee Chen. icassp 2011: 1641-1644 [doi]

2010

Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulatorYu-Hsin Chen, Tung-Chien Chen, Tsung-Hsueh Lee, Liang-Gee Chen. iscas 2010: 2083-2086 [doi]

Accuracy and power tradeoff in spike sorting microsystems with cubic spline interpolationYun-Yu Chen, Tung-Chien Chen, Liang-Gee Chen. iscas 2010: 1508-1511 [doi]

2009

2008

Data Reuse Exploration for Low Power Motion Estimation Architecture Design in H.264 EncoderYu-Han Chen, Tung-Chien Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Liang-Gee Chen. vlsisp, 50(1):1-17, 2008. [doi]

VLSI Architecture Design of Fractional Motion Estimation for H.264/AVCYi-Hau Chen, Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen. vlsisp, 53(3):335-347, 2008. [doi]

2007

Single Reference Frame Multiple Current Macroblocks Scheme for Multiple Reference Frame Motion Estimation in H.264/AVCTung-Chien Chen, Chuan-Yung Tsai, Yu-Wen Huang, Liang-Gee Chen. tcsv, 17(2):242-247, 2007. [doi]

System Bandwidth Analysis of Multiview Video Coding with Precedence ConstraintPei-Kuei Tsung, Li-Fu Ding, Wei-Yin Chen, Shao-Yi Chien, Tung-Chien Chen, Liang-Gee Chen. iscas 2007: 1001-1004 [doi]

2006

Low power and power aware fractional motion estimation of H.264/AVC for mobile applicationsTung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen. iscas 2006: [doi]

Power-Scalable Algorithm and Reconfigurable Macro-Block Pipelining Architecture of H.264 Encoder for Mobile ApplicationYu-Han Chen, Tung-Chien Chen, Liang-Gee Chen. icmcs 2006: 281-284 [doi]

Hardware architecture design of an H.264/AVC video codecTung-Chien Chen, Chung-Jr Lian, Liang-Gee Chen. aspdac 2006: 750-757 [doi]

Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoderTung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, Liang-Gee Chen. tcsv, 16(6):673-688, 2006. [doi]

Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile EncoderChuan-Yung Tsai, Tung-Chien Chen, Liang-Gee Chen. icmcs 2006: 1941-1944 [doi]

2005

2004

Analysis and design of macroblock pipelining for H.264/AVC VLSI architectureTung-Chien Chen, Yu-Wen Huang, Liang-Gee Chen. iscas 2004: 273-276

Hardware architecture design for H.264/AVC intra frame coderYu-Wen Huang, Bing-Yu Hsieh, Tung-Chien Chen, Liang-Gee Chen. iscas 2004: 269-272

2003

Computationally controllable integer, half, and quarter-pel motion estimator for MPEG-4 Advanced Simple ProfileWei-Min Chao, Tung-Chien Chen, Yung-Chi Chang, Chih-Wei Hsu, Liang-Gee Chen. iscas 2003: 788-791 [doi]