V. K. Agrawal - researchr alias

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2017

Hardware implementation of support vector machine classifier using reconfigurable architectureSantosh Kumar, J. Manikandan, V. K. Agrawal. icacci 2017: 45-50 [doi]

2016

An Exact approach for Complete Test Set Generation of Toffoli-Fredkin-Peres based Reversible CircuitsA. N. Nagamani, S. Ashwin, B. Abhishek, V. K. Agrawal. et, 32(2):175-196, 2016. [doi]

2015

Design and evaluation of FPGA based frequency demodulatorsSenthilkumar E., J. Manikandan, V. K. Agrawal. icacci 2015: 668-674 [doi]

2014

FPGA implementation of dynamically tunable filtersSenthilkumar E., Manikandan J., V. K. Agrawal. icacci 2014: 1852-1857 [doi]

MATLAB-Based GUI Development for Stochastic Noise Analysis of Tri-Axial GyroscopesA. Divya Rao, Piyush Kumar, Neha Nain, V. K. Agrawal. ised 2014: 109-114 [doi]

2013

Design of a Biometric Security System Using Support Vector Machine ClassifierJ. Manikandan, V. K. Agrawal, B. Venkataramani. icacni 2014: 173-181 [doi]

Design and Evaluation of N-Module Reconfigurable SystemsKunal Yogeshkumar Parikh, J. Manikandan, V. K. Agrawal. icacni 2014: 259-266 [doi]

2008

Software-Based Resolver-to-Digital Conversion Using a DSPSantanu Sarma, V. K. Agrawal, Subramanya Udupa. tie, 55(1):371-379, 2008. [doi]

2007

A New ATPG Technique (ExpoTan) for Testing Analog CircuitsB. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal. tcad, 26(1):189-196, 2007. [doi]

2004

A simple scheme for PSK demodulationP. Balasubramanian, P. M. Aravindakshan, K. Parameswaran, V. K. Agrawal. mam, 28(7):351-355, 2004. [doi]

A new ATPG technique (MultiDetect) for testing of analog macros in mixed-signal circuitsB. K. S. V. L. Varaprasad, Lalit M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal. tcad, 23(2):273-287, 2004. [doi]

2001

Genetic programming based pattern classification with feature space partitioningJ. K. Kishore, Lalit M. Patnaik, V. Mani, V. K. Agrawal. isci, 131(1-4):65-86, 2001.

An Efficient Test Pattern Generation Scheme for an On Chip BISTB. K. S. V. L. Varaprasad, L. M. Patnaik, Hirisave S. Jamadagni, V. K. Agrawal. vlsi, 2001(4):551-562, 2001. [doi]

2000

Application of genetic programming for multicategory pattern classificationJ. K. Kishore, Lalit M. Patnaik, V. Mani, V. K. Agrawal. tec, 4(3):242-258, 2000.

A hardware/software codesign for improved data acquisition in a processor based embedded systemF. Thomas, M. M. Nayak, Subramanya Udupa, J. K. Kishore, V. K. Agrawal. mam, 24(3):129-134, 2000. [doi]

1999

Design and implementation of a wheel speed measurement circuit using field programmable gate arrays in a spacecraftF. Thomas, J. K. Kishore, K. M. Bharadwaj, M. M. Nayak, V. K. Agrawal. mam, 22(9):553-560, 1999. [doi]

1994

A Real Time Fault Tolerant Microprocessor Based On-Board Computer System for INSAT-2 SpacecraftJ. K. Kishore, R. S. Manjunatha, V. K. Agrawal, N. K. Malik, P. S. Goel. ftrtft 1994: 476-487

1991

Extended colored Petri net: An efficient tool for analyzing concurrent systemsSajal K. Das, Dilip Sarkar, V. K. Agrawal, Lalit M. Patnaik. isci, 54(3):191-218, 1991. [doi]

1987

Reflexive Incidence Matrix (RIM) Representation of Petri NetsSajal K. Das, V. K. Agrawal, Dilip Sarkar, Lalit M. Patnaik, P. S. Goel. TSE, 13(6):643-653, 1987.

1985

Towards formal specification of a distributed computing systemV. K. Agrawal, Lalit M. Patnaik, Prem Shankar Goel. ijpp, 14(5):277-306, 1985. [doi]

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