Viktor K. Prasanna - researchr alias

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2011

Proceedings of the 8th Conference on Computing Frontiers, 2011, Ischia, Italy, May 3-5, 2011Calin Cascaval, Pedro Trancoso, Viktor K. Prasanna, editors, ACM, 2011.

Hybrid Data Structure for IP Lookup in Virtual Routers Using FPGAsOguzhan Erdem, Hoang Le, Viktor K. Prasanna, Cüneyt F. Bazlamaçci. fccm 2011: 253 [doi]

Memory-Efficient IPv4/v6 Lookup on FPGAs Using Distance-Bounded Path CompressionHoang Le, Weirong Jiang, Viktor K. Prasanna. fccm 2011: 242-249 [doi]

Memory-efficient and scalable virtual routers using FPGAHoang Le, Thilan Ganegedara, Viktor K. Prasanna. fpga 2011: 257-266 [doi]

FEACAN: Front-end acceleration for content-aware network processingYaxuan Qi, Kai Wang, Jeffrey Fong, Yibo Xue, Jun Li, Weirong Jiang, Viktor K. Prasanna. infocom 2011: 2114-2122 [doi]

Parallel evidence propagation on multicore processorsYinglong Xia, Viktor K. Prasanna. tjs, 57(2):189-202, 2011. [doi]

High Performance IP Lookup on FPGA with Combined Length-Infix Pipelined SearchYi-Hua Edward Yang, Oguzhan Erdem, Viktor K. Prasanna. fccm 2011: 77-80 [doi]

Space-time tradeoff in regular expression matching with semi-deterministic finite automataYi-Hua E. Yang, Viktor K. Prasanna. infocom 2011: 1853-1861 [doi]

Towards an inexact semantic complex event processing frameworkQunzhi Zhou, Yogesh Simmhan, Viktor K. Prasanna. debs 2011: 401-402 [doi]

Towards Reliable, Performant Workflows for Streaming-Applications on Cloud PlatformsDaniel Zinn, Quinn Hart, Timothy M. McPhillips, Bertram Ludäscher, Yogesh Simmhan, Michail Giakkoupis, Viktor K. Prasanna. ccgrid 2011: 235-244 [doi]

2010

FRuG: A benchmark for packet forwarding in future networksThilan Ganegedara, Weirong Jiang, Viktor K. Prasanna. ipccc 2010: 231-238 [doi]

Automation Framework for Large-Scale Regular Expression Matching on FPGAThilan Ganegedara, Yi-Hua E. Yang, Viktor K. Prasanna. fpl 2010: 50-55 [doi]

Parallel Exact Inference on a CPU-GPGPU Heterogenous SystemHyeran Jeon, Yinglong Xia, Viktor K. Prasanna. icpp 2010: 61-70 [doi]

Scalable multi-pipeline architecture for high performance multi-pattern string matchingWeirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasanna. ipps 2010: 1-12 [doi]

Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGAWeirong Jiang, Viktor K. Prasanna, Norio Yamagaki. fpl 2010: 394-399 [doi]

Architecture-aware data structure optimization for green IP lookupWeirong Jiang, Viktor K. Prasanna. hpsr 2010: 113-118 [doi]

High-throughput IP-lookup supporting dynamic routing tables using FPGAHoang Le, Viktor K. Prasanna. fpt 2010: 287-290 [doi]

A Memory-Efficient and Modular Approach for String Matching on FPGAsHoang Le, Viktor K. Prasanna. fccm 2010: 193-200 [doi]

Memory efficient string matching: a modular approach on FPGAs (abstract only)Hoang Le, Yi-Hua E. Yang, Viktor K. Prasanna. fpga 2010: 285 [doi]

Energy-Efficient Task Mapping for Data-Driven Sensor Network MacroprogrammingAnimesh Pathak, Viktor K. Prasanna. TC, 59(7):955-968, 2010. [doi]

ReConFig 10: 2010 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 13-15 December 2010, ProceedingsViktor K. Prasanna, Jürgen Becker, René Cumplido, editors, IEEE Computer Society, 2010.

Message from steering co-chairsViktor K. Prasanna. ipps 2010: 1 [doi]

Multi-dimensional packet classification on FPGA: 100 Gbps and beyondYaxuan Qi, Jeffrey Fong, Weirong Jiang, Bo Xu, Jun Li, Viktor K. Prasanna. fpt 2010: 241-248 [doi]

Provenance Collection in Reservoir Management Workflow EnvironmentsFan Sun, Jing Zhao, Karthik Gomadam, Viktor K. Prasanna. itng 2010: 82-87 [doi]

A message-passing multi-softcore architecture on FPGA for Breadth-first SearchQingbo Wang, Weirong Jiang, Yinglong Xia, Viktor K. Prasanna. fpt 2010: 70-77 [doi]

Parallel exact inference on the Cell Broadband Engine processorYinglong Xia, Viktor K. Prasanna. jpdc, 70(5):558-572, 2010. [doi]

Collaborative scheduling of DAG structured computations on multicore processorsYinglong Xia, Viktor K. Prasanna. cf 2010: 63-72 [doi]

Scalable Node-Level Computation Kernels for Parallel Exact InferenceYinglong Xia, Viktor K. Prasanna. TC, 59(1):103-115, 2010. [doi]

Hierarchical Scheduling of DAG Structured Computations on Manycore Processors with Dynamic Thread GroupingYinglong Xia, Viktor K. Prasanna, James Li. jsspp 2010: 154-174 [doi]

High throughput and large capacity pipelined dynamic search tree on FPGAYi-Hua E. Yang, Viktor K. Prasanna. fpga 2010: 83-92 [doi]

Head-body partitioned string matching for Deep Packet Inspection with scalable and attack-resilient performanceYi-Hua E. Yang, Viktor K. Prasanna, Chenqian Jiang. ipps 2010: 1-11 [doi]

High Performance Dictionary-Based String Matching for Deep Packet InspectionYi-Hua Edward Yang, Hoang Le, Viktor K. Prasanna. infocom 2010: 86-90 [doi]

Integrating Provenance Information in Reservoir EngineeringJing Zhao, Na Chen, Karthik Gomadam, Viktor K. Prasanna. webi 2010: 46-49 [doi]

Workflow management of simulation based computation processes in transportation domainQunzhi Zhou, Viktor K. Prasanna. iri 2010: 19-24 [doi]

Applying Semantic Web Techniques to Reservoir Engineering: Challenges and Experiences from Event ModelingTao Zhu, Amol Bakshi, Viktor K. Prasanna, Karthik Gomadam. itng 2010: 586-591 [doi]

2009

Scalable Packet Classification: Cutting or Merging?Weirong Jiang, Viktor K. Prasanna. icccn 2009: 1-6 [doi]

Large-scale wire-speed packet classification on FPGAsWeirong Jiang, Viktor K. Prasanna. fpga 2009: 219-228 [doi]

Sequence-preserving parallel IP lookup using multiple SRAM-based pipelinesWeirong Jiang, Viktor K. Prasanna. jpdc, 69(9):778-789, 2009. [doi]

Field-split parallel architecture for high performance multi-match packet classification using FPGAsWeirong Jiang, Viktor K. Prasanna. spaa 2009: 188-196 [doi]

A FPGA-based Parallel Architecture for Scalable High-Speed Packet ClassificationWeirong Jiang, Viktor K. Prasanna. asap 2009: 24-31 [doi]

Energy-Efficient Multi-Pipeline Architecture for Terabit Packet ClassificationWeirong Jiang, Viktor K. Prasanna. globecom 2009: 1-6 [doi]

Scalable High Throughput and Power Efficient IP-Lookup on FPGAHoang Le, Viktor K. Prasanna. fccm 2009: 167-174 [doi]

ReConFig 09: 2009 International Conference on Reconfigurable Computing and FPGAs, Cancun, Quintana Roo, Mexico, 9-11 December 2009, ProceedingsViktor K. Prasanna, Lionel Torres, RenÃ© Cumplido, editors, IEEE Computer Society, 2009.

Algorithm Design for Reconfigurable Computing SystemsViktor K. Prasanna. ersa 2009: 3

Transitive closure on the cell broadband engine: A study on self-scheduling in a multicore processorSudhir Vinjamuri, Viktor K. Prasanna. ipps 2009: 1-11 [doi]

Hierarchical Dependency Graphs: Abstraction and Methodology for Mapping Systolic Array Designs to Multicore ProcessorsSudhir Vinjamuri, Viktor K. Prasanna. pact 2009: 284-298 [doi]

Multi-Core Architecture on FPGA for Large Dictionary String MatchingQingbo Wang, Viktor K. Prasanna. fccm 2009: 96-103 [doi]

Parallel Evidence Propagation on Multicore ProcessorsYinglong Xia, Xiaojun Feng, Viktor K. Prasanna. pact 2009: 377-391 [doi]

16th International Conference on High Performance Computing, HiPC 2009, December 16-19, 2009, Kochi, India, ProceedingsYuanyuan Yang, Manish Parashar, Rajeev Muralidhar, Viktor K. Prasanna, editors, IEEE, 2009.

Memory-Efficient Pipelined Architecture for Large-Scale String MatchingYi-Hua Edward Yang, Viktor K. Prasanna. fccm 2009: 104-111 [doi]

2008

DOSA: design optimizer for scientific applicationsDavid A. Bader, Viktor K. Prasanna. ipps 2008: 1-5 [doi]

Architecture-Independent Programming for Wireless Sensor NetworksAmol B. Bakshi, Viktor K. Prasanna. Wiley, 2008. [doi]

Multi-Way Pipelining for Power-Efficient IP LookupWeirong Jiang, Viktor K. Prasanna. globecom 2008: 2339-243 [doi]

Multi-terabit ip lookup using parallel bidirectional pipelinesWeirong Jiang, Viktor K. Prasanna. cf 2008: 241-250 [doi]

Parallel IP lookup using multiple SRAM-based pipelinesWeirong Jiang, Viktor K. Prasanna. ipps 2008: 1-14 [doi]

Beyond TCAMs: An SRAM-Based Parallel Multi-Pipeline Architecture for Terabit IP LookupWeirong Jiang, Qingbo Wang, Viktor K. Prasanna. infocom 2008: 1786-1794 [doi]

A SRAM-based Architecture for Trie-based IP Lookup Using FPGAHoang Le, Weirong Jiang, Viktor K. Prasanna. fccm 2008: 33-42 [doi]

Scalable high-throughput SRAM-based architecture for IP-lookup using FPGAHoang Le, Weirong Jiang, Viktor K. Prasanna. fpl 2008: 137-142 [doi]

A pipelined-loop-compatible architecture and algorithm to reduce variable-length sets of floating-point data on a reconfigurable computerGerald R. Morris, Viktor K. Prasanna. jpdc, 68(7):913-921, 2008. [doi]

A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft ProcessorsJingzhao Ou, Viktor K. Prasanna. tvlsi, 16(1):45-56, 2008. [doi]

Energy-Efficient Task Mapping for Data-Driven Sensor Network MacroprogrammingAnimesh Pathak, Viktor K. Prasanna. dcoss 2008: 516-524 [doi]

High Performance Computing - HiPC 2008, 15th International Conference, Bangalore, India, December 17-20, 2008. ProceedingsP. Sadayappan, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna, editors, Volume 5374 of Lecture Notes in Computer Science, Springer, 2008. [doi]

Accelerating Molecular Dynamics Simulations with Reconfigurable ComputersRonald Scrofano, Maya Gokhale, Frans Trouw, Viktor K. Prasanna. tpds, 19(6):764-778, 2008. [doi]

Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point CoresRonald Scrofano, Ling Zhuo, Viktor K. Prasanna. tvlsi, 16(2):167-176, 2008. [doi]

Parallel Inferencing for OWL Knowledge BasesRamakrishna Soma, Viktor K. Prasanna. icpp 2008: 75-82 [doi]

Detecting Dirty Queries during Iterative Development of OWL Based ApplicationsRamakrishna Soma, Viktor K. Prasanna. otm 2008: 1500-1516 [doi]

A Data Partitioning Approach for Parallelizing Rule Based Inferencing for Materialized OWL Knowledge BasesRamakrishna Soma, Viktor K. Prasanna. ISCApdcs 2008: 19-25

Workflow instance detection: Toward a knowledge capture methodology for smart oilfieldsFan Sun, Viktor K. Prasanna, Amol Bakshi, Laurent Pianelo. iri 2008: 363-369 [doi]

Junction tree decomposition for parallel exact inferenceYinglong Xia, Viktor K. Prasanna. ipps 2008: 1-12 [doi]

Parallel exact inference on the cell broadband engine processorYinglong Xia, Viktor K. Prasanna. sc 2008: 58 [doi]

Automatic Construction of Large-Scale Regular Expression Matching Engines on FPGAYi-Hua E. Yang, Viktor K. Prasanna. reconfig 2008: 73-78 [doi]

Compact architecture for high-throughput regular expression matching on FPGAYi-Hua E. Yang, Weirong Jiang, Viktor K. Prasanna. ancs 2008: 30-39 [doi]

Data Gathering with Tunable Compression in Sensor NetworksYang Yu, Bhaskar Krishnamachari, Viktor K. Prasanna. tpds, 19(2):276-287, 2008. [doi]

Data component based management of reservoir simulation modelsCong Zhang, Amol Bakshi, Viktor K. Prasanna. iri 2008: 386-392 [doi]

Towards an integrated modeling and simulation framework for freight transportation in metropolitan areasQunzhi Zhou, Amol Bakshi, Viktor K. Prasanna, Ramakrishna Soma. iri 2008: 280-285 [doi]

Matrix Computations on Heterogeneous Reconfigurable SystemsLing Zhuo, Qingbo Wang, Viktor K. Prasanna. fccm 2008: 310-311 [doi]

Scalable Hybrid Designs for Linear Algebra on Reconfigurable Computing SystemsLing Zhuo, Viktor K. Prasanna. TC, 57(12):1661-1675, 2008. [doi]

High-Performance Designs for Linear Algebra Operations on Reconfigurable HardwareLing Zhuo, Viktor K. Prasanna. TC, 57(8):1057-1071, 2008. [doi]

2007

High Performance Computing - HiPC 2007, 14th International Conference, Goa, India, December 18-21, 2007, ProceedingsSrinivas Aluru, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna, editors, Volume 4873 of Lecture Notes in Computer Science, Springer, 2007.

DOSA: Design Optimizer for Scientific ApplicationsDavid A. Bader, Viktor K. Prasanna. ipps 2007: 1-6 [doi]

Adaptive Allocation of Independent Tasks to Maximize ThroughputBo Hong, Viktor K. Prasanna. tpds, 18(10):1420-1435, 2007. [doi]

Algorithms and Architectures for Parallel Processing, 7th International Conference, ICA3PP 2007, Hangzhou, China, June 11-14, 2007, ProceedingsHai Jin, Omer F. Rana, Yi Pan, Viktor K. Prasanna, editors, Volume 4494 of Lecture Notes in Computer Science, Springer, 2007.

A window-assisted video partitioning strategy for partitioning and caching video streams in distributed multimedia systemsXiaorong Li, Bharadwaj Veeravalli, Viktor K. Prasanna. jpdc, 67(6):738-754, 2007. [doi]

A model-based extensible framework for efficient application design using FPGASumit Mohanty, Viktor K. Prasanna. todaes, 12(2), 2007. [doi]

Sparse Matrix Computations on Reconfigurable HardwareGerald R. Morris, Viktor K. Prasanna. Computer, 40(3):58-64, 2007. [doi]

Enabling Scope-Based Interactions in Sensor Network MacroprogrammingLuca Mottola, Animesh Pathak, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco. mass 2007: 1-9 [doi]

A Compilation Framework for Macroprogramming Networked SensorsAnimesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco. dcoss 2007: 189-204 [doi]

Expressing Sensor Network Interaction Patterns Using Data-Driven MacroprogrammingAnimesh Pathak, Luca Mottola, Amol Bakshi, Viktor K. Prasanna, Gian Pietro Picco. percom 2007: 255-260 [doi]

Scientific Computing using Reconfigurable HardwareViktor K. Prasanna. ersa 2007: 13

A Semantic Framework for Integrated Asset Management in Smart OilfieldsRamakrishna Soma, Amol Bakshi, Viktor K. Prasanna. ccgrid 2007: 119-126 [doi]

An Architecture of a Workflow System for Integrated Asset Management in the Smart Oil Field DomainRamakrishna Soma, Amol Bakshi, Viktor K. Prasanna. IEEEscc 2007: 191-198 [doi]

Fault-tolerant analysis for multiple servers movie retrieval strategy for distributed multimedia applicationsBharadwaj Veeravalli, Chaoyang Chen, Viktor K. Prasanna. mta, 32(1):1-27, 2007. [doi]

Node Level Primitives for Parallel Exact InferenceYinglong Xia, Viktor K. Prasanna. sbac-pad 2007: 221-228 [doi]

Parallel Exact InferenceYinglong Xia, Viktor K. Prasanna. parco 2008: 185-192

ModelML: a Markup Language for Automatic Model SynthesisCong Zhang, Amol Bakshi, Viktor K. Prasanna. iri 2007: 317-322 [doi]

High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAsLing Zhuo, Gerald R. Morris, Viktor K. Prasanna. tpds, 18(10):1377-1392, 2007. [doi]

Scalable and Modular Algorithms for Floating-Point Matrix Multiplication on Reconfigurable Computing SystemsLing Zhuo, Viktor K. Prasanna. tpds, 18(4):433-448, 2007. [doi]

Optimizing Matrix Multiplication on Heterogeneous Reconfigurable SystemsLing Zhuo, Viktor K. Prasanna. parco 2008: 561-568

Hardware/Software Co-Design for Matrix Computations on Reconfigurable Computing SystemsLing Zhuo, Viktor K. Prasanna. ipps 2007: 1-10 [doi]

2006

High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, ProceedingsYves Robert, Manish Parashar, Ramamurthy Badrinath, Viktor K. Prasanna, editors, Volume 4297 of Lecture Notes in Computer Science, Springer, 2006.

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