Volnei A. Pedroni - researchr alias

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2011

A very efficient single-iteration oldest-out data sorterVolnei A. Pedroni, Ricardo P. Jasinski, Ricardo U. Pedroni. iscas 2011: 2141-2144 [doi]

2010

Analysis and Preliminary Measurements of Radiated Emissions in an Asynchronous Circuit versus its Synchronous CounterpartRui A. L. de Cristo, Ricardo P. Jasinski, Volnei A. Pedroni. reconfig 2010: 127-131 [doi]

An Improved GF(2) Matrix Inverter with Linear Time ComplexityRicardo P. Jasinski, Volnei A. Pedroni, Antonio Gortan, Walter Godoy Jr.. reconfig 2010: 322-327 [doi]

2007

Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2007, Copacabana, Rio de Janeiro, Brazil, September 3-6, 2007Antonio Petraglia, Volnei A. Pedroni, Gert Cauwenberghs, editors, ACM, 2007.

2006

PLL-less clock multiplier with self-adjusting phase symmetryVolnei A. Pedroni, R. U. Pedroni. iscas 2006: [doi]

Phase sampling: a new approach to the design of LF direct digital frequency synthesizersVolnei A. Pedroni. iscas 2006: [doi]

2004

Compact Hamming-Comparator-based rank order filter for digital VLSI and FPGA implementationsVolnei A. Pedroni. iscas 2004: 585-588

Taking advantage of LVDS input buffers to implement sigma-delta A/D converters in FPGAsFabio Sousa, Volker Mauer, Neimar Duarte, Ricardo P. Jasinski, Volnei A. Pedroni. iscas 2004: 1088-1091 [doi]

2003

High-Resolution WTA-MAX Circuit for Large NetworksVolnei A. Pedroni. vlsi 2003: 150-154

Teaching Design-Oriented VHDLVolnei A. Pedroni. mse 2003: 6-7 [doi]

1994

A Charge-Based Parallel Analog Vector QuantizerGert Cauwenberghs, Volnei A. Pedroni. nips 1995: 779-787 [doi]