Yoshiaki Asao - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 9 from 9

2017

A Comprehensive Model for Write Disturbance in Resistive Memory Composed of Cross-Point ArrayYoshiaki Asao, Fumio Horiguchi. ieicet, 100-C(3):329-339, 2017. [doi]

2016

A Precise Model for Cross-Point Memory ArrayYoshiaki Asao, Fumio Horiguchi. ieicet, 99-C(1):119-128, 2016. [doi]

2010

A 64Mb MRAM with clamped-reference and adequate-reference schemesKenji Tsuchida, Tsuneo Inaba, Katsuyuki Fujita, Yoshihiro Ueda, Takafumi Shimizu, Yoshiaki Asao, Takeshi Kajiyama, Masayoshi Iwayama, Kuniaki Sugiura, Sumio Ikegawa, Tatsuya Kishi, Tadashi Kai, Minoru Amano, Naoharu Shimomura, Hiroaki Yoda, Yohji Watanabe. isscc 2010: 258-259 [doi]

2008

A Statistical Model for Assessing the Fault Tolerance of Variable Switching Currents for a 1Gb Spin Transfer Torque Magnetoresistive Random Access MemoryYoshiaki Asao, Masayoshi Iwayama, Kenji Tsuchida, Akihiro Nitayama, Hiroaki Yoda, Hisanori Aikawa, Sumio Ikegawa, Tatsuya Kishi. dft 2008: 507-515 [doi]

2006

2002

Memory design using a one-transistor gain cell on SOITakashi Ohsawa, Katsuyuki Fujita, Tomoki Higashi, Yoshihisa Iwata, Takeshi Kajiyama, Yoshiaki Asao, Kazumasa Sunouchi. jssc, 37(11):1510-1522, 2002. [doi]

1997

Flexible test mode approach for 256-Mb DRAMToshiaki Kirihata, Hing Wong, John K. DeBrosse, Yohji Watanabe, Takahiko Hara, Munehiro Yoshida, Matthew R. Wordeman, Shuso Fujii, Yoshiaki Asao, Bo Krsnik. jssc, 32(10):1525-1534, 1997. [doi]

1996

Fault-tolerant designs for 256 Mb DRAMToshiaki Kirihata, Yohji Watanabe, Hing Wong, John K. DeBrosse, Munehiro Yoshida, Daisuke Kato, Shuso Fujii, Matthew R. Wordeman, Peter Poechmueller, Stephen A. Parke, Yoshiaki Asao. jssc, 31(4):558-566, 1996. [doi]

Sign in or sign up to see more results.

runs on WebDSL