Journal: VLSI Signal Processing

Volume 52, Issue 3

211 -- 229Chun-Lung Hsu, Yu-Sheng Huang. A Fast-Deblocking Boundary-strength Based Architecture Design of Deblocking Filter in H.264/AVC Applications
231 -- 247Pilar Reyes, Pedro Reviriego, Juan Antonio Maestro, Oscar Ruano. Fault Tolerance Analysis of Communication System Interleavers: the 802.11a Case Study
249 -- 261Awais M. Kamboh, Andrew Mason, Karim G. Oweiss. Analysis of Lifting and B-Spline DWT Implementations for Implantable Neuroprosthetics
263 -- 280Zhiguo Zhang, Shing-Chow Chan, Ka-Leung Ho, K. C. Ho. On Bandwidth Selection in Local Polynomial Regression Analysis and Its Application to Multi-resolution Analysis of Non-uniform Data
281 -- 295Ch. Rambabu, I. Chakrabarti. An Efficient Hillclimbing-based Watershed Algorithm and its Prototype Hardware Architecture
297 -- 311Thomas Lenart, Mats Gustafsson, Viktor Öwall. A Hardware Acceleration Platform for Digital Holographic Imaging
313 -- 324Chiou-Yng Lee, Che Wun Chiou. New Bit-Parallel Systolic Architectures for Computing Multiplication, Multiplicative Inversion and Division in GF(2:::m:::) Under Polynomial Basis and Normal Basis Representations

Volume 52, Issue 2

111 -- 126Yu Li, Yun He. Bandwidth Optimized and High Performance Interpolation Architecture in Motion Compensation for H.264/AVC HDTV Decoder
127 -- 135Chua-Chin Wang, Gang-Neng Sung, Pai-Li Liu. Power-Aware Design of An 8-Bit Pipelining ANT-Based CLA Using Data Transition Detection
137 -- 151Mariusz Bajger, Amos Omondi. Low-error, High-speed Approximation of the Sigmoid Function for Large FPGA Implementations
153 -- 163Shi-Huang Chen, Yaotsu Chang, Jiun-Ching Ruan. An Efficient Computation of LSP Frequencies Using Modified Complex-Free Ferrari Formula
165 -- 180H. Cheng, S. C. Chan, Z. G. Zhang. Robust Channel Estimation and Multiuser Detection for MC-CDMA Systems Under Narrowband Interference
181 -- 191F. Angarita, Ma José Canet, T. Sansaloni, A. Perez-Pascual, Javier Valls. Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN
193 -- 210Hua Wang, Francky Catthoor, Miguel Miranda, Wim Dehaene. Synthesis of Runtime Switchable Pareto Buffers Offering Full Range Fine Grained Energy/Delay Trade-Offs

Volume 52, Issue 1

1 -- 11Robert T. Grisamore, Earl E. Swartzlander Jr.. Negative Save Sign Extension for Multi-term Adders and Multipliers
13 -- 34Hyunuk Jung, Hoeseok Yang, Soonhoi Ha. Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis
35 -- 44F. Angarita, Ma José Canet, T. Sansaloni, Javier Valls, Vicenc Almenar-Terre. Architectures for the Implementation of a OFDM-WLAN Viterbi Decoder
45 -- 57Albert Mo Kim Cheng, Yan Wang. A Dynamic Voltage Scaling Algorithm for Dynamic Workloads
59 -- 73Yen-Liang Chen, Ming-Feng Hsu, Jyh-Ting Lai, An-Yeu Wu. Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme
75 -- 94Fredrik Kristensen, Hugo Hedberg, Hongtu Jiang, Peter Nilsson, Viktor Öwall. An Embedded Real-Time Surveillance System: Implementation and Evaluation
95 -- 109Yanmei Qu, Shunliang Mei, Yun He. A Cost-effective VLD Architecture for MPEG-2 and AVS