Journal: VLSI Signal Processing

Volume 67, Issue 3

201 -- 212Salvatore Pontarelli, Gian-Carlo Cardarilli, Marco Re, Adelio Salsano. Optimized Implementation of RNS FIR Filters Based on FPGAs
213 -- 228Jianwei Niu, Meikang Qiu, Xiaofei Wang, Jiayin Li, Gang Wu, Tianzhou Chen. Cost Minimization with HPDFG and Data Mining for Heterogeneous DSP
229 -- 237Kavallur Gopi Smitha, A. Prasad Vinod. A Reconfigurable Channel Filter for Software Defined Radio Using RNS
239 -- 253Jiayin Li, Meikang Qiu, Jianwei Niu, Yongxin Zhu, Meiqin Liu, Tianzhou Chen. Three-Phase Algorithms for Task Scheduling in Distributed Mobile DSP System with Lifetime Constraints
255 -- 268Evangelos Vassalos, Dimitris Bakalis. CSD-RNS-based Single Constant Multipliers
269 -- 277Davinder Pal Sharma, Jasvir Singh. Simulation and Spectral Analysis of the Scrambler for 56Kbps Modem
279 -- 290Chia-Te Liao, Wen-Hao Lee, Shang-Hong Lai. A Flexible PCB Inspection System Based on Statistical Learning
291 -- 303Byung Cheol Song, Yongseok Yi, Yun-Gu Lee, Nak Hoon Kim, Jun Hyuk Ko, Tae-Hee Kim, Dong-Keun Lim, Woo Hyun Ju, Jae-Pil Moon, Kyunghwan Cho. 1080p 60 Hz Intra-Frame Video CODEC Chip Design and Its Implementation
305 -- 316Shing-Chow Chan, Zhenyu Zhu, K. T. Ng, C. Wang, Shuai Zhang, Z. G. Zhang, Zhongfu Ye, Heung-Yeung Shum. The Design and Construction of a Movable Image-Based Rendering System and Its Application to Multiview Conferencing
317 -- 330Ke Xu, Min Zhang, Chiu-sing Choy. Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase
331 -- 0Jae Do Lee, Myung Hoon Sunwoo. Erratum to: Three-Parallel Reed-Solomon Decoder Using S-DCME for High-Speed Communications

Volume 67, Issue 2

93 -- 103Hongxing Wei, Huaming Li, Jindong Tan. Body Sensor Network Based Context-Aware QRS Detection
105 -- 116Sunanda Manke, Kavita Khare, S. D. Sapre. FPGA Implementation of Cross Virtual Concatenation Transmitter/ Receiver for Data Transmission over Next Generation SDH Systems
117 -- 128Wei Xiong, Yi-Ou Li, Nicolle M. Correa, Xi-Lin Li, Vince D. Calhoun, Tülay Adali. Order Selection of the Linear Mixing Model for Complex-Valued FMRI Data
129 -- 138Azzam Y. Al-nahari, Moawad I. Dessouky, Fathi E. Abd El-Samie. Cooperative Space-Time Coding with Amplify-and- Forward Relaying
139 -- 155Mohammed Sayed, Wael M. Badawy, Graham A. Jullien. Interpolation-Free Fractional-Pixel Motion Estimation Algorithms with Efficient Hardware Implementation
157 -- 166Imtiaz Sajid, M. M. Ahmed, Sotirios G. Ziavras. Novel Pipelined Architecture for Efficient Evaluation of the Square Root Using a Modified Non-Restoring Algorithm
167 -- 185Anissa Mokraoui, Vianney Muñoz-Jiménez, Jean Pierre Astruc. Motion Estimation Algorithms Using the Deformation of Planar Hierarchical Mesh Grid for Videoconferencing Applications at Low Bit-rate Transmission
187 -- 199Nabin Ghoshal, J. K. Mandal, A. Khamrui. An Authentication Technique for Image/Legal Document (ATILD)

Volume 67, Issue 1

1 -- 2Lesley Shannon, Oliver Diessel, Neil W. Bergmann. Guest Editorial: Field-Programmable Technology
3 -- 13Paul Beckett, Tayab D. Memon. Reconfigurable Blocks Based on Balanced Ternary
15 -- 29Tim Güneysu. Using Data Contention in Dual-ported Memories for Security Applications
31 -- 46Neil Hockert, Katherine Compton. Improving Floating-Point Performance in Less Area: Fractured Floating Point Units (FFPUs)
47 -- 63David Grant, Graeme Smecher, Guy G. F. Lemieux, Rosemary Francis. Rapid Synthesis and Simulation of Computational Circuits in an MPPA
65 -- 78Qiang Liu, Tim Todman, Wayne Luk, George A. Constantinides. Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms
79 -- 91Xiang Tian, Khaled Benkrid. Implementation of the Longstaff and Schwartz American Option Pricing Model on FPGA