Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm

Shomit Das, Georgios Manetas, Kenneth S. Stevens, Roberto Suaya. Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm. In 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), Tempe, AZ, USA, April 21-24, 2013. pages 1-2, IEEE, 2013. [doi]

Abstract

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