Kapil Dev, Sherief Reda, Indrani Paul, Wei Huang, Wayne Burleson. Workload-Aware Power Gating Design and Run-Time Management for Massively Parallel GPGPUs. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, PA, USA, July 11-13, 2016. pages 242-247, IEEE, 2016. [doi]
Abstract is missing.