A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator

Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec. A design approach to automatically generate on-chip monitors during high-level synthesis of hardware accelerator. In Joseph R. Cavallaro, Tong Zhang 0002, Alex K. Jones, Hai Helen Li, editors, Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21 - 23, 2014. pages 273-278, ACM, 2014. [doi]

Abstract

Abstract is missing.