Ali Jahanian, Morteza Saheb Zamani. Improved timing closure by early buffer planning in floor-placement design flow. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 558-563, ACM, 2007. [doi]
Abstract is missing.