A low-power high-speed 32/33 prescaler based on novel divide-by-4/5 unit with improved true single-phase clock logic

Song Jia, Shilin Yan, Yuan Wang, Ganggang Zhang. A low-power high-speed 32/33 prescaler based on novel divide-by-4/5 unit with improved true single-phase clock logic. In 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015, Lisbon, Portugal, May 24-27, 2015. pages 890-893, IEEE, 2015. [doi]

Abstract

Abstract is missing.