A wide output range, mismatch tolerant Sigma Delta DAC for digital PLL in 90nm CMOS - researchr publication

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Anant S. Kamath, Biman Chattopadhyay. A wide output range, mismatch tolerant Sigma Delta DAC for digital PLL in 90nm CMOS. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 69-72, IEEE, 2012. [doi]

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