From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding

Olivier Muller, Amer Baghdadi, Michel Jézéquel. From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding. IEEE Trans. VLSI Syst., 17(1):92-102, 2009. [doi]

Abstract

Abstract is missing.