The following publications are possibly variants of this publication:
- RISC I: A Reduced Instruction Set VLSI ComputerDavid A. Patterson, Carlo H. Séquin. isca 1981: 443-458
- RISC I: A Reduced Instruction Set VLSI ComputerDavid A. Patterson, Carlo H. Séquin. isca 1998: 216-230 [doi]
- Reduced Instruction Set ComputersDavid A. Patterson. CACM, 28(1):8-21, 1985.
- Embracing and Extending 20th-Century Instruction Set ArchitecturesJoe Gebis, David A. Patterson. Computer, 40(4):68-75, 2007. [doi]
- A VLSI RISCDavid A. Patterson, Carlo H. Séquin. Computer, 15(9):8-21, 1982.