A. Robinson, Jim D. Garside. Sensitive registers: a technique for reducing the fetch bandwidth in low-power microprocessors. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 138-143, ACM, 2007. [doi]
Abstract is missing.