FPGA implementation of reconfigurable ADPLL network for distributed clock generation

C. Shan, Eldar Zianbetov, Mohammad Javidan, François Anceau, Mehdi Terosiet, Sylvain Feruglio, Dimitri Galayko, Olivier Romain, Éric Colinet, Jérôme Juillard. FPGA implementation of reconfigurable ADPLL network for distributed clock generation. In Russell Tessier, editor, 2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011. pages 1-4, IEEE, 2011. [doi]

Abstract

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