A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context - researchr publication

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Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini. A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context. In Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009. pages 929-933, IEEE, 2009. [doi]

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