Area-Efficient Signed Fixed-Width Multipliers with Low-Error Compensation Circuit

Jiun-Ping Wang, Shiann-Rong Kuang. Area-Efficient Signed Fixed-Width Multipliers with Low-Error Compensation Circuit. In Proceedings of the IEEE Workshop on Signal Processing Systems, SiPS 2007, Proceedings, October 17-19, 2007, Eton Hotel, Shanghai, China. pages 157-162, IEEE, 2007. [doi]

Abstract

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