Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs

Jun Zhu, Ingo Sander, Axel Jantsch. Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs. In Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010. pages 1035-1040, IEEE, 2010. [doi]

Abstract

Abstract is missing.