Table of Contents

• High performance adaptive routing for Network-on-Chip systems with express highway mechanismShih-Chieh Lin, En-Jui Chang, Yu-Yin Chen, Hsien-Kai Hsin, An-Yeu Andy Wu. 1-4 [doi]
• Low delay-variation sub-/near-threshold asynchronous-to-synchronous interface controller for GALS Network-on-ChipsWeng-Geng Ho, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang. 5-8 [doi]
• An efficient distortion model configuration for depth coding in 3D-HEVCChenyang Li, Xin Jin, Qionghai Dai. 9-12 [doi]
• Edge information based fast selection algorithm for intra prediction of HEVCWen Shi, Xiantao Jiang, Tian Song, Takashi Shimamoto. 17-20 [doi]
• Compressive imaging by generalized total variation minimizationJie Yan, Wu-Sheng Lu. 21-24 [doi]
• An image estimation method by header information in JPEG 2000 codestreams and its application to image identificationKatsuma Takimoto, Toshiyuki Dobashi, Hiroshi Ishikawa, Hitoshi Kiya. 25-28 [doi]
• Edge preserving super-resolution with details based on similar texture synthesisKatsuya Kondo, Hideaki Fujiwara. 29-32 [doi]
• A multiscale retinex based on wavelet transformationKozue Kawasaki, Akira Taguchi. 33-36 [doi]
• Improved HSI color space without gamut problemAkira Taguchi, Naoki Nakajima, Yoshikatsu Hoshi. 37-40 [doi]
• Frequency-to-voltage converter for temperature compensation of CMOS RC relaxation oscillatorHiroki Sato, Shigetaka Takagi. 41-44 [doi]
• A simple switched-capacitor algorithmic digital-to-analog converter using sample/hold and dividerHiroki Matsumoto. 45-48 [doi]
• A 1-V DTMOS-Based fully differential telescopic OTAJiaxin Liu, Yu Han, Liangbo Xie, Yao Wang, Guangjun Wen. 49-52 [doi]
• A folded-cascode OP Amp with a dynamic switching bias circuitHiroo Wakaumi. 53-56 [doi]
• A 104μW EMI-resisting bandgap voltage reference achieving -20dB PSRR, and 5% DC shift under a 4dBm EMI levelShiheng Yang, Pui-In Mak, Rui Paulo Martins. 57-60 [doi]
• Simplifying HOG arithmetic for speedy hardware realizationJian-Feng Wang, Chiu-sing Choy, Tak-Lon Chao, Ko-Chun Kit, Kong-Pang Pun, Wan-Li Ouyang, Xiao-Gang Wang. 61-64 [doi]
• Reducing temporal redundancy in MJPEG using Zipfian estimation techniquesNgoc-Sinh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran. 65-68 [doi]
• A unified flagged prefix constant addition-subtraction scheme for design of area and power efficient binary floating-point and constant integer arithmetic circuitsSoumya Ganguly, Abhishek Mittal, Syed Ershad Ahmed, M. B. Srinivas. 69-72 [doi]
• VLSI implementation of belief-propagation-based stereo matching with linear-model message updateShen-Fu Hsiao, Jun-Ming Huang, Po-Sheng Wu. 73-76 [doi]
• H.264/AVC hardware encoders and low-power featuresNgoc Mai Nguyen, Edith Beigné, Suzanne Lesecq, Duy-Hieu Bui, Nam-Khanh Dang, Xuan-Tu Tran. 77-80 [doi]
• Formant frequency estimation with windowless autocorrelation in the presence of noiseYu Iwai, Tetsuya Shimamura. 81-84 [doi]
• Noise activity detection based on 4th order cumulant for impact noiseNorihiro Mamizu, Naoto Sasaoka, Yoshio Itoh. 85-88 [doi]
• Packet loss concealment for VoIP based on Pitch Waveform Replication and Linear Predictive CodingMasahiro Toyoshima, Tetsuya Shimamura. 89-92 [doi]
• A study on footstep detection in outdoor environment using Itakura-Saito distanceShota Tanaka, Akitoshi Itai, Hiroshi Yasukawa. 93-96 [doi]
• Progressive audio scrambling via wavelet transformTwe Ta Oo, Takao Onoye. 97-100 [doi]
• Load regulation cancellation based on adaptive body bias for STC-LDOsShi Bu, Marco Ho, Ka Nang Leung, Jianping Guo. 101-104 [doi]
• A low-dropout regulator with power supply rejection improvement by bandwidth-zero trackingYan Lu, Ruo He Yao, Da Qiang Huang, Julien Su, Junmin Jiang, Wing-Hung Ki. 105-108 [doi]
• Analysis of CMOS low-dropout regulator - Power-supply rejection ratioMarco Ho, Ka Nang Leung, Pui Ying Or, Jianping Guo. 109-112 [doi]
• A 10-b, 500 MSPS current steering CMOS DAC with a switching current cell and high SFDR valueManas Kumar Hati, Tarun Kanti Bhattacharyya. 113-116 [doi]
• A high throughput Gaussian noise generatorQing Lu, Jianfeng Fan, Chiu-Wing Sham, Francis C. M. Lau. 117-120 [doi]
• Effectiveness of dual-rail CSSAL against power analysis attack under CMOS process variationCâncio Monteiro, Yasuhiro Takahashi, Toshikazu Sekine. 121-124 [doi]
• On the impact of transceiver impairments to cognitive DF relay networksDang Khoa Nguyen, Hiroshi Ochi. 125-128 [doi]
• Development of special-purpose computer based on Virtex-7 FPGA for high-speed digital holographyKazuki Kamegai, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito, Nobuyuki Masuda. 129-132 [doi]
• A low complexity soft demapping method for expanded M-QAM constellationsShigenori Kinjo. 137-140 [doi]
• Transient responses of voltage and current on dual-mode ring resonator bandpass filtersKazuhito Murakami. 141-144 [doi]
• Performance evaluation of single carrier transmission using frequency domain equalizationShinichiro Miyazaki, Shoichiro Yamasaki, Ryuji Kohno. 145-148 [doi]
• High frequency ring oscillator using capacitor based level shift circuitsTakahide Sato, Takeshi Nagata, Daisuke Kanemoto. 149-152 [doi]
• Multi-Gb/s multi-mode LDPC decoder architecture for IEEE 802.11ad standardSabooh Ajaz, Hanho Lee. 153-156 [doi]
• Live demonstration: A low-power high-level synthesis systemHua-Hsin Yeh, Chun-Hua Cheng, Shih-Hsu Huang. 165-166 [doi]
• Live Demo: Sensor network system for rainwater grid: APCCAS track selection: System and networks for safe and secure lifeToshiyuki Moriyama, Shinobu Izumi, Katsunon Morishita, Koji Nishiyama. 167-168 [doi]
• Live demonstration: FPGA based 3840×2160 video decoding and displaying systemHaoming Zhang, Dajiang Zhou, Satoshi Goto. 169-170 [doi]
• Live demonstration: Hardware-software co-verification for very large scale SoC using synopsys HAPS platformNana Sutisna, Leonardo Lanante, Yuhei Nagao, Masayuki Kurosaki, Hiroshi Ochi. 171-172 [doi]
• Live demonstration: A battery smart sensor for smart gridL. Lin, N. Kawarabayashi, M. Fukui, Isao Shirakawa. 173-174 [doi]
• Live demonstration: IEEE802.11 wireless LAN system verification platformTatsumi Uwai, Leonardo Lanante, Baiko Sai, Hiroshi Ochi, Yuhei Nagao, Nico Surantha. 175-176 [doi]
• Live demonstration: An ECG-on-Chip for wearable wireless sensorsChacko John Deepu, X. Zhang, W.-S. Liew, David Liang Tai Wong, Yong Lian. 177-178 [doi]
• Live demonstration: A 3D die-level integration platformChih-Chyau Yang, Yi-Jun Liu, Chien-Ming Wu, Chun-Ming Huang. 179-180 [doi]
• A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swingMarco Ho, Shi Bu, Yanqi Zheng, Ka Nang Leung, Jianping Guo. 181-184 [doi]
• A 12-bit 200-kS/s SAR ADC with hybrid RC DACMi-rim Kim, Young-Ouk Kim, Yong-Sik Kwak, Gil-Cho Ahn. 185-188 [doi]
• Calibration of the Nauta structure differential OTAArtemij Iberzanov, Andrew Nicholson, Julian Jenkins, Torsten Lehmann, Tara Julia Hamilton. 189-192 [doi]
• Voltage-mode quadrature oscillator using VD-DIBA active elementsJosef Bajer, Jiri Vavra, Dalibor Biolek. 197-200 [doi]
• Analysis of a compact BCC transceiver based on PLL FSK modulator/demodulatorChaoxun Wang, Ke Lin, Bo Wang, Jiali Hou, Mo Wang, Kai Xu, Xin'an Wang. 201-204 [doi]
• Delay-line-based signal processing ASIC for velocity selective nerve recordingRobert Rieger, John Taylor. 205-208 [doi]
• A high-speed truly random number generator based on an autonomous chaotic oscillatorSalih Ergün. 217-220 [doi]
• IC implementation of spike-timing-dependent synaptic plasticity model using low capacitance valueDaichi Yamashita, Katsutoshi Saeki, Yoshifumi Sekine. 221-224 [doi]
• Highly linear inductively degenerated 0.13μm CMOS LNA using FDC techniqueSana Arshad, Rashad Ramzan, Faiza Zafar, Qamar-ul-Wahab. 225-228 [doi]
• On a piecewise linear enclosure method of continuous functions of many variablesHideaki Okazaki, Hideo Nakano Shonan. 229-232 [doi]
• Oscillation death and amplitude change in coupled van der pol oscillators with strong frustrationsYoko Uwate, Yoshifumi Nishio. 233-236 [doi]
• Effect of tiredness on voice signals using neural network systemsNaoki Fujiwara, Ryota Inoue, Satoru Kidhida. 237-239 [doi]
• A novel glitch reduction circuitry for binary-weighted DACFang-Ting Chou, Chia-Min Chen, Zong-Yi Chen, Chung-Chih Hung. 240-243 [doi]
• A floorplan-aware high-level synthesis algorithm for multiplexer reduction targeting FPGA designsKoichi Fujiwara, Shin-ya Abe, Kazushi Kawamura, Masao Yanagisawa, Nozomu Togawa. 244-247 [doi]
• A floorplan-driven high-level synthesis algorithm with operation chainings using chaining enumerationKotaro Teradat, Masao Yanagisawa, Nozomu Togawa. 248-251 [doi]
• Scan-based side-channel attack on Camellia cipher using scan signaturesHuiqian Hang, Mika Fujishiro, Hirokazu Kodera, Masao Yanagisawa, Nozomu Togawa. 252-255 [doi]
• Hardware Trojan detection with linear regression based gate-level characterizationLi Zhang, Chip-Hong Chang. 256-259 [doi]
• High-efficient queue-based spin locks for Network-on-Chip processorsZhenqi Wei, Peilin Liu, Rongdi Sun, Rendong Ying. 260-263 [doi]
• Scalable video coding using allpass-based wavelet filtersXi Zhang, Takuya Suzuki. 264-267 [doi]
• A high-throughput interpolator for fractional motion estimation in high efficient video coding (HEVC) systemsChun-Yu Lung, Chung-An Shen. 268-271 [doi]
• Object recognition based on generalized linear regression classification in use of color informationYang-Ting Chou, Jar-Ferr Kevin Yang. 272-275 [doi]
• Edge adaptive hybrid norm prior method for blurred image reconstructionJian-Jiun Ding, Wei-Sheng Lai, Hao-Hsuan Chang, Chir-Weei Chang, Chuan-Chung Chang. 276-279 [doi]
• A highly parallel SAD architecture for motion estimation in HEVC encoderAhmed Medhat, Ahmed Shalaby, Mohammed S. Sayed, Maha Elsabrouty, Farhad Mehdipour. 280-283 [doi]
• Large DC gain nonisolated converter based on a new L-C-D step-up switching cellKerui Li, Adrian Ioinovici. 284-287 [doi]
• Analytical design procedure for resonant inductively coupled wireless power transfer system with class-DE inverter and class-E rectifierTomoharu Nagashima, Xiuqin Wei, Hiroo Sekiya. 288-291 [doi]
• Input characteristic impedance technique of power converters circuits applied to the maximum power point tracker of photovoltaic panelsJefferson William Zanotti, Denizar Cruz Martins. 292-295 [doi]
• An area-overhead-oriented monitoring-path selection algorithm for suspicious timing error predictionShinnosuke Yoshida, Youhua Shi, Masao Yanagisawa, Nozomu Togawa. 300-303 [doi]
• A write-reducing and error-correcting code generation method for non-volatile memoriesTatsuro Kojo, Masashi Tawada, Masao Yanagisawa, Nozomu Togawa. 304-307 [doi]
• Self-adjusting mechanism to dynamically suppress the effect of PVT variations on clock skewTsung-Tang Lin, Wen-Pin Tu, Shih-Hsu Huang. 308-311 [doi]
• Timing analysis and optimization of voltage scaled CMOS digital circuits with dual-Vth devicesAnne Lorraine S. Luna, John Richard E. Hizon, Louis P. Alarcón. 312-315 [doi]
• 100-Mbps transceiver for enhanced MIL-STD-1553Divya Duvvuri, P. Vijaya Sankara Rao, J. Chattopadhyay. 316-319 [doi]
• Spatially-modulated space-time coding in visible light communications using 2×2 LED arrayKatsunori Ebihara, Koji Kamakura, Takaya Yamazato. 320-323 [doi]
• A study on parallel transmission wireless visible light communications using color shift keyingTadahiro Wada, Haruki Furukawa, Kaiji Mukumoto. 324-327 [doi]
• BER characteristic of optical-OFDM using OCIYuki Goto, Isamu Takai, Takaya Yamazato, Hiraku Okada, Akitoshi Fujii, Shoji Kawahito, Shintaro Arai, Tomohiro Yendo, Koji Kamakura. 328-331 [doi]
• Channel fluctuation measurement for image sensor based I2V-VLC, V2I-VLC, and V2V-VLCMasayuki Kinoshita, Takaya Yamazato, Hiraku Okada, Toshiaki Fujii, Shintaro Arai, Tomohiro Yendo, Koji Kamakura. 332-335 [doi]
• Improving communication rate of visible light communication system using high-speed cameraDaigo Iwase, Makoto Kasai, Tomohiro Yendo, Shintaro Arai, Takaya Yamazato, Hiraku Okada, Toshiaki Fujii. 336-339 [doi]
• A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOSTaisuke Hamada, Hao Jiang, Yiming Fang, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu. 340-343 [doi]
• Design of ultra-low voltage and low-power CMOS current bleeding mixerGim Heng Tan, Roslina Mohd Sidek, Maryam bt. Mohd Isa. 344-347 [doi]
• A wideband CMOS LNA-mixer for cognitive radio receiverNandini Vitee, Harikrishnan Ramiah, Wei-Keat Chong. 348-351 [doi]
• A DC-2.5GHz voltage variable attenuator in 0.18-μm CMOS technologyIbrahim L. Abdalla, Ahmed Allam, Ramesh K. Pokharel, Hongting Jia. 352-355 [doi]
• A low-voltage high-linearity low noise amplifier for wireless body area networksRen-Yuan Huang, Ro-Min Weng, Huo-Ying Chang. 356-358 [doi]
• Interleaved-bitslice AES encryption and decryption with massive-parallel mobile embedded processorTakeshi Kumaki, Takeshi Fujino, Tetsushi Koide. 359-362 [doi]
• Low cost hardware implementation for traffic sign detection systemAnh Tuan Hoang, Tetsushi Koide, Masaharu Yamamoto. 363-366 [doi]
• Custom instruction search for application specific instruction-set processor using guided simulated annealingAmr Fathy, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda. 367-370 [doi]
• A dual-mode scheduling algorithm for task graphs with data parallelismYang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama. 371-374 [doi]
• Dalvik bytecode acceleration using Fetch/Decode Hardware Extension with hybrid ExecutionSurachai Thongkaew, Tsuyoshi Isshiki, Dongju Li, Hiroaki Kunieda. 375-378 [doi]
• Relations on the bounds of the number of channels on multi-hop wireless networksHiroshi Tamura, Kaoru Watanabe, Shoji Shinoda. 379-382 [doi]
• A study on bicycle crash risk based on GPS trajectories collected from bidirectional trafficDongwook Lee, Sangjun Park, Minsoo Hahn. 383-386 [doi]
• Improvement and evaluation of the wireless ad hoc network protocol FORP for inter-vehicle communicationsTakuya Nishimaki, Koichi Gyoda. 387-390 [doi]
• Wide area sensor network for disaster prevention and monitoring: Concept and service coverageYongnu Jin, Kyung Sup Kwak, Masakazu Sengoku, Shoji Shinoda. 391-394 [doi]
• Implementation of web-based system for building damage assessment on online network: Case studies of Typhoon MAN-YI (1318) and Typhoon WIPHA (1326) in JapanMunenari Inoguchi, Keiko Tamura, Kei Horie, Haruo Hayashi. 395-398 [doi]
• An energy-efficient baseband transmitter design for implantable biotelemetry applicationsDeyasini Majumdar, Mithun Ceekala, Kamal El-Sankary, Christian Schlegel. 399-402 [doi]
• Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screeningDiyang Zhao, Ka-Meng Lei, Pui-In Mak, Man Kay Law, Rui Paulo Martins. 403-406 [doi]
• An ultra-low voltage comparator with improved comparison time and reduced offset voltageYongfu Li, Wei Mao, Zhe Zhang, Yong Lian. 407-410 [doi]
• Study on analysis of movement-related cortical potentials included in saccade-related EEGMotoki Hayakawa, Shoya Ueda, Akitoshi Itai, Arao Funase. 411-414 [doi]
• Sensor factors influencing photoplethysmographyAmmar Y. K. Timimi, M. A. Mohd Ali. 415-418 [doi]
• Jitter compensation technique for continuous-time sigma-delta modulatorZong-Yi Chen, Chung-Chih Hung. 423-426 [doi]
• 2, low-power front-end circuit of receiver in 0.18μm CMOS for IEEE 802.11a applicationChang-Hsi Wu, Yu-Po Lin, Hong-Cheng You, Shun-Zhao Huang. 427-430 [doi]
• Area-efficient check node unit architecture for single block-row quasi-cyclic LDPC codesChuan Zhang, Shenghui Weng, Xiaohu You, Zhongfeng Wang. 431-434 [doi]
• Statistical analysis of inner products from normal-vectors to 3D point cloud clusteringTomitaka Hotta, Munetoshi Iwakiri. 435-438 [doi]
• An insertion loss control method for supplementing cancellation effect deteriorated by echo path change in hands free telecommunication systemKensaku Fujii, Mitsuji Muneyasu, Takuya Sawada, Takuto Yoshioka, Masakazu Morimoto. 439-442 [doi]
• A study on using microcontroller to design active noise control systemsKuo-Kai Shyu, Chung-Ying Ho, Cheng-Yuan Chang. 443-446 [doi]
• A study on acoustic beam steering with parametric loudspeaker based on individual delay-filtering for carrier and sideband wavesMasato Nakayama, Takanobu Nishiura, Ryota Okuno, Noboru Nakasako. 447-450 [doi]
• Integration of active noise control and other acoustic signal processing techniquesYoshinobu Kajikawa. 451-454 [doi]
• Phase shift compensation on active vibration isolation system using adaptive signal processingYun-Hui Liu, Hung-En Hsieh, Wei-Hao Wu. 455-458 [doi]
• A study on gas sensors using a SAW deviceKatutoshi Sugiyama, Katsutoshi Saeki, Minoru Saito Nihon, Yoshifumi Sekine. 459-462 [doi]
• A low-voltage low-power CMOS time-domain temperature sensor accurate to within [-0.1, +0.5] °C From -40 °C To 125 °CJun Tan, Alexander Rolapp, Eckhard Hennig. 463-466 [doi]
• A dual-exposure in-pixel charge subtraction CTIA CMOS image sensor for centroid measurement in star trackersXinyuan Qian, Menghan Guo, Hang Yu, Shoushun Chen, Kay-Soon Low. 467-470 [doi]
• Soft-error tolerant TCAMs for high-reliability packet classificationsInfall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase. 471-474 [doi]
• Multilevel phase change memory cell modelNemat H. El-Hassan, T. Nandha Kumar, Haider Abbas F. Almurib. 475-478 [doi]
• Closed-form design of fixed fractional hubert transformer using discrete sine transformChien-Cheng Tseng, Su-Ling Lee. 479-482 [doi]
• Digital image sharpening using Riesz fractional order derivative and discrete hartley transformChien-Cheng Tseng, Su-Ling Lee. 483-486 [doi]
• Pilot based LMMSE channel estimation for Multi-User MIMO- OFDM systems with power delay profileP. Krishna, Tipparti Anil Kumar, K. Kishan Rao. 487-490 [doi]
• Patch-based finger encoding for hand posture recogntionKanjana Pattanaworapan, Kosin Chamnongthai. 491-494 [doi]
• Skew tolerance analysis and layout design of 4×4 multiplier using two phase clocking subthreshold adiabatic logicKazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine. 495-498 [doi]
• Adaptive filter-based reconstruction engine design for compressive sensingNai-Shan Huang, Yu-Min Lin, Yi Chen, An-Yeu Andy Wu. 499-502 [doi]
• Least-squares design of IIR all-pass filters using closed-form Toeplitz-plus-Hankel matrixYue-Dar Jou, Fu-Kun Chen. 503-506 [doi]
• High-efficiency multiple 4×4 and 8×8 inverse transform design with a cost-effective unified architecture for multistandard video decodersChia-Wei Chang, Hao-Fan Hsu, Chih-Peng Fan. 507-510 [doi]
• AMVP prediction algorithm for adaptive parallel improvement of HEVCXiantao Jiang, Tian Song, Takashi Shimamoto, Lisheng Wang. 511-514 [doi]
• Temporal prediction improvement for parallel processing of HEVCXiantao Jiang, Tian Song, Takashi Shimamoto, Wen Shi, Lisheng Wang. 515-518 [doi]
• n+1-1}Thian Fatt Tay, Chip-Hong Chang. 519-522 [doi]
• Conflict-free FFT circuit using loop architecture by 5-bank memory systemTakashi Nishitsuji, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito. 523-526 [doi]
• Intensity/saturation enhancement based on differential gray-levels histogram equalizationNaoki Nakajima, Akira Taguchi. 527-530 [doi]
• Accurate and low-cost DOA estimation method using array covariance matrix elementsYu Iwabuchi, Koichi Ichige. 531-534 [doi]
• DOA estimation for low-cost array antenna system based on GROUSE and EM algorithmsKeita Yamada, Koichi Ichige. 535-538 [doi]
• Lossless data hiding method using error correction codeTsubasa Nobeoka, Leonardo Lanante, Masayuki Kurosaki, Hiroshi Ochi. 539-542 [doi]
• Design of computational circuit for calculation of parallel phase-shifting digital holographyShunsuke Matoba, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito, Nobuyuki Masuda. 543-546 [doi]
• Development of volumetric display based on multi-bit color LEDRyuji Hirayama, Hirotaka Nakayama, Takashi Kakue, Tomoyoshi Shimobaba, Tomoyoshi Ito, Atsushi Shiraki. 547-550 [doi]
• A 20 GHz power detector with 176 mV/dB conversion gainChua-Chin Wang, Deng-Shian Wang, Shiou-Ya Chen, Chia-Ming Chang. 551-554 [doi]
• Secure scan design using improved random order and its evaluationsMasaru Oya, Yuta Atobe, Youhua Shi, Masao Yanagisawa, Nozomu Togawa. 555-558 [doi]
• Detecting clones in wireless sensor networks using Single Stage Memory Random Walk with Network DivisionWazir Zada Khan, Mohamad Naufal bin Mohamad Saad, Mohammed Y. Aalsalem, Xaing Yang. 559-562 [doi]
• An all-digital battery capacity monitor using calibrated current estimation approachChua-Chin Wang, Wen-Je Lu, Min-Yu Tseng. 563-566 [doi]
• Simple and concise photovoltaic power generation system installed in verandaKeiju Matsui, Eiji Oishi, Mikio Yasubayashi, Yasutaka Kawata, Masayoshi Umeno, Hideo Uchida, Masaru Hasegawa. 567-570 [doi]
• Automotive hybrid voltage regulator design with adaptive LDO dropout using load-sense techniqueKrishna Kanth Gowri Avalur, Syed Azeemuddin. 571-574 [doi]
• Analysis of two-phase on-chip step-down switched capacitor power convertersJunmin Jiang, Yan Lu, Wing-Hung Ki. 575-578 [doi]
• A fast and precise circuit simulation method for switching power converters using a mixture of circuits and behavioral modelsKei Watanabe, Mikio Abe, Toru Sai, Yasuhiro Sugimoto. 579-582 [doi]
• A critical net reshape-router for high-performance VLSI layout designYusuke Morimoto, Mitsuru Matsushita, Michiaki Muraoka, Masahiko Toyonaga. 587-590 [doi]
• High-voltage tolerant switch configuration using standard 3.3-V 0.5-μm silicon-on-sapphire CMOS transistorsAsish Zac Alex, Torsten Lehmann. 591-594 [doi]
• A region adaptive encoding algorithm for simple image compressionYing-Jou Chen, Jian-Jiun Ding, Ching-Wen Hsiao, Hao-Hsuan Chang. 595-598 [doi]
• Design of an efficient active noise cancellation circuit for in-ear headphonesKuan-Hung Chen, Hong-Son Vu, Kuo-Yuan Weng, Jin-Huang Huang, Yu-Ting Tsai, Yu-cheng Liu, Wen-Hung Wang. 599-602 [doi]
• On maximizing tree reliability based on minimum diameter spanning treeGenya Ishigaki, Masao Yoshida, Norihiko Shinomiya. 603-606 [doi]
• Impact of on-chip interconnects on vertical signal propagation in 3D ICsNanako Niioka, Masayuki Watanabe, Rosely Karel, Tetsuya Kobayashi, Masashi Imai, Masa-Aki Fukase, Atsushi Kurokawa. 607-610 [doi]
• Abstract bus interface unit for ESL design from TLM 2.0 communications to the real bus protocolHua-Hsin Yeb, Wen-Pin Tu, Jian-Zhi Shen, Tung-Hua Yen, Shih-Hsu Huang. 611-614 [doi]
• A real-time architecture of multiple features extraction for vehicle verificationLi-Hung Wang, Chao-Kai Cheng, Chung-Bin Wu. 615-618 [doi]
• Adjacent common centroid placement for analog IC layout designKenichiro Murotatsu, Kunihiro Fujiyoshi. 619-622 [doi]
• LVQ neural network SoC adaptable to different on-chip learning and recognition applicationsFengwei An, Toshinobu Akazawa, Shogo Yamazaki, Lei Chen, Hans Jürgen Mattausch. 623-626 [doi]
• Power dissipation analysis of memristor for low power integrated circuit applicationsHaruki Ogata, Yasuhiro Takahashi, Toshikazu Sekine. 627-630 [doi]
• Design of low power and improved tlatch comparator for SAR ADCIffa Sharuddin, L. Lee. 631-634 [doi]
• Design and simulation of a wideband channelized transceiver for DRFM applicationsAjinkya Kale, P. Vijaya Sankara Rao, J. Chattopadhyay. 635-638 [doi]
• Efficient data transfer scheme using word-pair-encoding-based compression for large-scale text-data processingHasitha Muthumala Waidyasooriya, Daisuke Ono, Masanori Hariyama, Michitaka Kameyama. 639-642 [doi]
• Privacy preserving face recognition in encrypted domainOvgu Ozturk Ergun. 643-646 [doi]
• A note on the energy-aware mapping for NoCsSatoshi Tayu, Shuichi Ueno. 647-650 [doi]
• FPGA implementation of type identifier for colorectal endoscopie images with NBI magnificationTetsushi Koide, Anh Tuan Hoang, Takumi Okamoto, Satoshi Shigemi, Tsubasa Mishima, Toru Tamaki, Bisser Raytchev, Kazufumi Kaneda, Yoko Kominami, Rie Miyaki, Taiji Matsuo, Shigeto Yoshida, Shinji Tanaka. 651-654 [doi]
• CAN compression using signal rearrangementYujing Wu, Zhe-Yan Piao, Jun-Ho Kim, Jin-Gyun Chung. 655-658 [doi]
• An 8 Gbps, 4: 1 transition-aware self-toggling multiplexerWei-Zen Chen, Yi-Hung Yang. 659-662 [doi]
• Simplified forced convergence decoding algorithm for low power LDPC decodersByung-Jun Choi, Myung Hoon Sunwoo. 663-666 [doi]
• New parallel MDC FFT processor with efiicient scheduling schemeMoon Gi Kim, Sung Kyung Shin, Myung Hoon Sunwoo. 667-670 [doi]
• The next hop selection of distance vector by local centrality measureYoshihiro Kaneko, Yuhei Ishii. 671-674 [doi]
• A systematic network-on-chip traffic modeling and generation methodologyZhe Wang, Weichen Liu, Jiang Xu, Xiaowen Wu, Zhehui Wang, Bin Li, Ravi Iyer, Ramesh Illikkal. 675-678 [doi]
• An NoC-based evaluation platform for safety-critical automotive applicationsTomohiro Yoneda, Masashi Imai, Hiroshi Saito, Takahiro Hanyu, Kenji Kise, Yuichi Nakamura. 679-682 [doi]
• Highly reliable single-ended current-mode circuit for an inter-chip asynchronous communication linkAkira Mochizuki, Hirokatsu Shirahama, Naoya Onizawa, Takahiro Hanyu. 683-686 [doi]
• Energy-and-performance efficient differential domino logic cell libraries for QDI-model-based asynchronous circuitsMasashi Imai, Tomohiro Yoneda. 687-690 [doi]
• An extended framework for worst-case throughput analysis with router constraintVineeth Mohan, Wenjing Hsu, Wei Zhang, Xiaowen Wu. 691-694 [doi]
• A low-power subthreshold-to-superthreshold level-shifter for sub-0.5V embedded resistive RAM (ReRAM) macro in ultra low-voltage chipsMeng-Fan Chang, Che-Wei Wu, Jui-Yu Hung, Ya-Chin King, Chomg-Jung Lin, Mon-Shu Ho, Chia-Cheng Kuo, Shyh-Shyuan Sheu. 695-698 [doi]
• Comparative study of power-gating architectures for nonvolatile SRAM cells based on spintronics technologyYusuke Shuto, Shuu'ichirou Yamamoto, Satoshi Sugahara. 699-702 [doi]
• A novel design of a memristor-based look-up table (LUT) for FPGAT. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi. 703-706 [doi]
• Numerical free-disposal-hull data-envelopment analysis of potential CMOS-successor technologiesMatthias Korb, Andreas Kleine. 707-710 [doi]
• A randomized algorithm for the fixed-length routing problemTieyuan Pan, Ran Zhang, Yasuhiro Takashima, Takahiro Watanabe. 711-714 [doi]
• VLSI design of an interference canceller for QPSK OFDM-IDMA systemsMai Nozaki, Shingo Yoshizawa, Hiroshi Tanimoto. 715-718 [doi]
• Broadband fully silicon integrated differential balun and LNA for space applicationsYves Germain, Julien Lintignat, Bernard Jarry, Bruno Barelaud, Vincent Armengaud, Luc Lapierre. 723-726 [doi]
• A design of low complex log likelihood ratio for MIMO decoder using the bit shiftReina Hongyo, Thi Hong Tran, Leonardo Lanante, Hiroshi Ochi, Yuhei Nagao. 727-730 [doi]
• Secure wireless communications using secret sharing and vector codingShoichiro Yamasaki, Tomoko K. Matsushima, Shinichiro Miyazaki. 731-734 [doi]
• In-situ timing monitoring methods for variation-resilient designsYouhua Shi, Nozomu Togawa. 735-738 [doi]
• Timing error prediction based adaptive voltage scaling for dynamic variation toleranceWeiwei Shan, Zhipeng Xu. 739-742 [doi]
• Hybrid dynamic thermal management method with model predictive controlJian Ma, Hai Wang, Sheldon X.-D. Tan, Chi Zhang, He Tang. 743-746 [doi]
• Delay estimation method for correlated net delay variationsMasatsugu Hosoki, Seiya Nagatsuka, Yasuhiro Takashima. 747-750 [doi]
• Stochastic verification of run-time performance adaptation with field delay testingMasanori Hashimoto. 751-754 [doi]
• Characteristic analysis and tolerance analysis of nonlinear resistive circuits using integer programmingKiyotaka Yamamura, Hiroshi Taki. 755-758 [doi]
• Effect of substrate contacts on reducing crosstalk noise between TSVsMasayuki Watanabe, Rosely Karel, Nanako Niioka, Tetsuya Kobayashi, Masa-Aki Fukase, Masashi Imai, Atsushi Kurokawa. 763-766 [doi]
• Revising algorithm for nonnegative matrix factorization based on minimizing quasi-L1 normMotoaki Mouri, Ichi Takumi, Hiroshi Yasukawa, Andrzej Cichocki. 767-770 [doi]
• Hopfield neural networks with problem perturbing noiseHironori Kumeno. 771-774 [doi]