Abstract is missing.
- An evaluation of the TRIPS computer systemMark Gebhart, Bertrand A. Maher, Katherine E. Coons, Jeff Diamond, Paul Gratz, Mario Marino, Nitya Ranganathan, Behnam Robatmili, Aaron Smith, James H. Burrill, Stephen W. Keckler, Doug Burger, Kathryn S. McKinley. 1-12 [doi]
- Architectural implications of nanoscale integrated sensing and computingConstantin Pistol, Christopher Dwyer, Alvin R. Lebeck. 13-24 [doi]
- CTrigger: exposing atomicity violation bugs from their hiding placesSoyeon Park, Shan Lu, Yuanyuan Zhou. 25-36 [doi]
- ASSURE: automatic software self-healing using rescue pointsStelios Sidiroglou, Oren Laadan, Carlos Perez, Nicolas Viennot, Jason Nieh, Angelos D. Keromytis. 37-48 [doi]
- Recovery domains: an organizing principle for recoverable operating systemsAndrew Lenharth, Vikram S. Adve, Samuel T. King. 49-60 [doi]
- Anomaly-based bug prediction, isolation, and validation: an automated approach for software debuggingMartin Dimitrov, Huiyang Zhou. 61-72 [doi]
- Capo: a software-hardware interface for practical deterministic multiprocessor replayPablo Montesinos, Matthew Hicks, Samuel T. King, Josep Torrellas. 73-84 [doi]
- DMP: deterministic shared memory multiprocessingJoseph Devietti, Brandon Lucia, Luis Ceze, Mark Oskin. 85-96 [doi]
- Kendo: efficient deterministic multithreading in softwareMarek Olszewski, Jason Ansel, Saman P. Amarasinghe. 97-108 [doi]
- Complete information flow tracking from the gates upMohit Tiwari, Hassan M. G. Wassel, Bita Mazloom, Shashidhar Mysore, Frederic T. Chong, Timothy Sherwood. 109-120 [doi]
- RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizationsDavid K. Tam, Reza Azimi, Livio Soares, Michael Stumm. 121-132 [doi]
- Per-thread cycle accounting in SMT processorsStijn Eyerman, Lieven Eeckhout. 133-144 [doi]
- Maximum benefit from a minimal HTMOwen S. Hofmann, Christopher J. Rossbach, Emmett Witchel. 145-156 [doi]
- Early experience with a commercial hardware transactional memory implementationDavid Dice, Yossi Lev, Mark Moir, Daniel Nussbaum. 157-168 [doi]
- Mixed-mode multicore reliabilityPhilip M. Wells, Koushik Chakraborty, Gurindar S. Sohi. 169-180 [doi]
- ISOLATOR: dynamically ensuring isolation in comcurrent programsSriram K. Rajamani, Ganesan Ramalingam, Venkatesh Prasad Ranganath, Kapil Vaswani. 181-192 [doi]
- Efficient online validation with delta executionJoseph Tucek, Weiwei Xiong, Yuanyuan Zhou. 193-204 [doi]
- PowerNap: eliminating server idle powerDavid Meisner, Brian T. Gold, Thomas F. Wenisch. 205-216 [doi]
- Gordon: using flash memory to build fast, power-efficient clusters for data-intensive applicationsAdrian M. Caulfield, Laura M. Grupp, Steven Swanson. 217-228 [doi]
- DFTL: a flash translation layer employing demand-based selective caching of page-level address mappingsAayush Gupta, Youngjae Kim, Bhuvan Urgaonkar. 229-240 [doi]
- Commutativity analysis for software parallelization: letting program transformations see the big pictureFarhana Aleen, Nathan Clark. 241-252 [doi]
- Accelerating critical section execution with asymmetric multi-core architecturesM. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt. 253-264 [doi]
- Producing wrong data without doing anything obviously wrong!Todd Mytkowicz, Amer Diwan, Matthias Hauswirth, Peter F. Sweeney. 265-276 [doi]
- Leak pruningMichael D. Bond, Kathryn S. McKinley. 277-288 [doi]
- Dynamic prediction of collection yield for managed runtimesMichal Wegiel, Chandra Krintz. 289-300 [doi]
- TwinDrivers: semi-automatic derivation of fast and safe hypervisor network drivers from guest OS driversAravind Menon, Simon Schubert, Willy Zwaenepoel. 301-312 [doi]
- Phantom-BTB: a virtualized branch target buffer designIoana Burcea, Andreas Moshovos. 313-324 [doi]
- StreamRay: a stream filtering architecture for coherent ray tracingKarthik Ramani, Christiaan P. Gribble, Al Davis. 325-336 [doi]
- Architectural support for SWAR text processing with parallel bit streams: the inductive doubling principleRobert D. Cameron, Dan Lin. 337-348 [doi]