Abstract is missing.
- Side channel attacks and the non volatile memory of the futureZoya Dyka, Christian Walczyk, Damian Walczyk, Christian Wenger, Peter Langendoerfer. 13-16 [doi]
- A cost-effective tag design for memory data authentication in embedded systemsMei Hong, Hui Guo, Sharon X. Hu. 17-26 [doi]
- Static secure page allocation for light-weight dynamic information flow trackingJuan Carlos Martinez Santos, Yunsi Fei, Zhijie Jerry Shi. 27-36 [doi]
- From sequential programming to flexible parallel executionArun Raman, Jae W. Lee, David I. August. 37-40 [doi]
- A hybrid just-in-time compiler for android: comparing JIT types and the result of cooperationGuillermo Pérez, Chung-Min Kao, Yeh-Ching Chung, Wei-Chung Hsu. 41-50 [doi]
- LLBT: an LLVM-based static binary translatorBor-Yeh Shen, Jiunn-Yeu Chen, Wei-Chung Hsu, Wuu Yang. 51-60 [doi]
- Power agnostic technique for efficient temperature estimation of multicore embedded systemsDevendra Rai, Hoeseok Yang, Iuliana Bacivarov, Lothar Thiele. 61-70 [doi]
- Scenario-based design flow for mapping streaming applications onto on-chip many-core systemsLars Schor, Iuliana Bacivarov, Devendra Rai, Hoeseok Yang, Shin-Haeng Kang, Lothar Thiele. 71-80 [doi]
- The RACECAR heuristic for automatic function specialization on multi-core heterogeneous systemsJohn Robert Wernsing, Greg Stitt, Jeremy Fowers. 81-90 [doi]
- Siblingrivalry: online autotuning through local competitionsJason Ansel, Maciej Pacula, Yee Lok Wong, Cy P. Chan, Marek Olszewski, Una-May O'Reilly, Saman P. Amarasinghe. 91-100 [doi]
- Function inlining and loop unrolling for loop acceleration in reconfigurable processorsNarasinga Rao Miniskar, Pankaj Shailendra Gode, Soma Kohli, Donghoon Yoo. 101-110 [doi]
- A low-overhead interconnect architecture for virtual reconfigurable fabricsAaron Landy, Greg Stitt. 111-120 [doi]
- Energy efficient hybrid display and predictive models for embedded and mobile systemsYuanfeng Wen, Ziyi Liu, Weidong Shi, Yifei Jiang, Albert M. K. Cheng, Khoa Le, Yuanfeng Wen. 121-130 [doi]
- Energy efficient special instruction support in an embedded processor with compact isaDongrui She, Yifan He, Henk Corporaal. 131-140 [doi]
- When less is more (LIMO): controlled parallelism forimproved efficiencyGaurav Chadha, Scott A. Mahlke, Satish Narayanasamy. 141-150 [doi]
- Lazy cache invalidation for self-modifying codesAnthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge. 151-160 [doi]
- Static task partitioning for locked caches in multi-core real-time systemsAbhik Sarkar, Frank Mueller, Harini Ramaprasad. 161-170 [doi]
- Revisiting level-0 caches in embedded processorsNam Duong, Taesu Kim, Dali Zhao, Alexander V. Veidenbaum. 171-180 [doi]
- Architectural synthesis of flow-based microfluidic large-scale integration biochipsWajid Hassan Minhass, Paul Pop, Jan Madsen, Felician Stefan Blaga. 181-190 [doi]
- DaaC: device-reserved memory as an eviction-based file cacheJinkyu Jeong, Hwanju Kim, Jeaho Hwang, Joonwon Lee, Seungryoul Maeng. 191-200 [doi]
- Integrating software caches with scratch pad memoryPrasenjit Chakraborty, Preeti Ranjan Panda. 201-210 [doi]
- Analytical approaches for performance evaluation of networks-on-chipAbbas Eslami Kiasari, Axel Jantsch, Marco Bekooij, Alan Burns, Zhonghai Lu. 211-212 [doi]
- Embedded reconfigurable architecturesStephan Wong, Luigi Carro, Stamatios Kavvadias, Georgios Keramidas, Francesco Papariello, Claudio Scordino, Roberto Giorgi, Stefanos Kaxiras. 213-214 [doi]