Abstract is missing.
- The Transmeta Code Morphing - Software: Using Speculation, Recovery, and Adaptive Retranslation to Address Real-Life ChallengesJames C. Dehnert, Brian Grant, John P. Banning, Richard Johnson, Thomas Kistler, Alexander Klaiber, Jim Mattson. 15-24 [doi]
- Dynamic Binary Translation for Accumulator-Oriented ArchitecturesHo-Seop Kim, James E. Smith. 25-35 [doi]
- Retargetable and Reconfigurable Software Dynamic TranslationKevin Scott, Naveen Kumar, S. Velusamy, Bruce R. Childers, Jack W. Davidson, Mary Lou Soffa. 36-47 [doi]
- Jumbo: Run-Time Code Generation for Java and Its ApplicationsSam Kamin, Lars Clausen, Ava Jarvis. 48-58 [doi]
- Reality-Based OptimizationScott McFarling. 59-68 [doi]
- Coupling On-Line and Off-Line Profile Information to Improve Program PerformanceChandra Krintz. 69-78 [doi]
- Dynamic Trace Selection Using Performance Monitoring Hardware SamplingHoward Chen, Wei-Chung Hsu, Dong-yuan Chen. 79-90 [doi]
- Optimal and Efficient Speculation-Based Partial Redundancy EliminationQiong Cai, Jingling Xue. 91-104 [doi]
- Optimizations to Prevent Cache Penalties for the Intel ® Itanium 2 ProcessorJean-Francois Collard, Daniel M. Lavery. 105-114 [doi]
- Optimization for the Intel® Itanium ®Architectur Register StackAlex Settle, Daniel A. Connors, Gerolf Hoflehner, Daniel M. Lavery. 115-124 [doi]
- Speculative Register Promotion Using Advanced Load Address Table (ALAT)Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew. 125-134 [doi]
- Inlining of Mathematical Functions in HP-UX for Itanium ® 2James W. Thomas. 135-148 [doi]
- Improving Quasi-Dynamic Schedules through Region SlipFrancesco Spadini, Brian Fahs, Sanjay J. Patel, Steven S. Lumetta. 149-158 [doi]
- Integrated Prepass Scheduling for a Java Just-In-Time Compiler on the IA-64 ArchitectureTatsushi Inagaki, Hideaki Komatsu, Toshio Nakatani. 159-168 [doi]
- Predicate-Aware Scheduling: A Technique for Reducing Resource ConstraintsMikhail Smelyanskiy, Scott A. Mahlke, Edward S. Davidson, Hsien-Hsin S. Lee. 169-178 [doi]
- Phi-Predication for Light-Weight If-ConversionWeihaw Chuang, Brad Calder, Jeanne Ferrante. 179-192 [doi]
- Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data CacheEnric Gibert, F. Jesús Sánchez, Antonio González. 193-203 [doi]
- Compiler Optimization-Space ExplorationSpyridon Triantafyllis, Manish Vachharajani, Neil Vachharajani, David I. August. 204-215 [doi]
- Optimizing Memory Accesses For Spatial ComputationMihai Budiu, Seth Copen Goldstein. 216-227 [doi]
- Optimization Opportunities Created by Global Data ReorderingGadi Haber, Moshe Klausner, Vadim Eisenberg, Bilha Mendelson, Maxim Gurevich. 228-240 [doi]
- Design, Implementation and Evaluation of Adaptive Recompilation with On-Stack ReplacementStephen J. Fink, Feng Qian. 241-252 [doi]
- Adaptive Online Context-Sensitive InliningKim M. Hazelwood, David Grove. 253-264 [doi]
- An Infrastructure for Adaptive Dynamic OptimizationDerek Bruening, Timothy Garnett, Saman P. Amarasinghe. 265-275 [doi]
- Dynamic Profiling and Trace Cache GenerationMarc Berndl, Laurie J. Hendren. 276-288 [doi]
- METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary RewritingJaydeep Marathe, Frank Mueller, Tushar Mohan, Bronis R. de Supinski, Sally A. McKee, Andy Yoo. 289-300 [doi]
- TEST: A Tracer for Extracting Speculative ThreadMichael K. Chen, Kunle Olukotun. 301-314 [doi]
- Code Optimization for Code CompressionMilenko Drinic, Darko Kirovski, Hoi Vo. 315-324 [doi]
- Hiding Program Slices for Software SecurityXiangyu Zhang, Rajiv Gupta. 325-336 [doi]
- Addressing Mode SelectionErik Eckstein, Bernhard Scholz. 337-346 [doi]