Abstract is missing.
- Modeling Time-Triggered Architecture Based Safety-Critical Embedded Systems Using SystemCJon Perez, Carlos Fernando Nicolas, Roman Obermaisser, Christian El Salloum. 10-15
- A Solution to the Lack of Multiple Inheritance in SystemVerilogDavid Rich. 16-21
- Feature-Oriented Refactoring Proposal for Transaction Level Models in SoCLibJun Ye, Qingping Tan, Tun Li, Bin Wu, Yuanru Meng. 22-27
- Complete Verification of Weakly Programmable IPs against Their Operational ISA ModelSacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz. 29-36
- Evaluating Debugging Algorithms from a Qualitative PerspectiveAlexander Finder, Görschwin Fey. 37-42
- Mapping of Concurrent Object-Oriented Models to Extended Real-Time Task NetworksMatthias Büker, Kim Grüttner, Philipp A. Hartmann, Ingo Stierand. 43-48
- A Tripartite System Level Design Approach for Design Space ExplorationPeter Brunmayr, Jan Haase, Christoph Grimm. 50-55
- Towards an ESL Framework for Timing and Power Aware Rapid Prototyping of HW/SW SystemsKim Grüttner, Kai Hylla, Sven Rosinger, Wolfgang Nebel. 56-61
- Reconstructing Line References from Optimized Binary Code for Source-Level AnnotationStefan Stattelmann, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel. 62-67
- Early Robustness Evaluation of Digital Integrated SystemsRégis Leveugle. 69-70
- Bounded Fault Tolerance CheckingAndré Sülflow. 71
- Robustness with Respect to Error SpecificationsBarbara Jobstmann. 72
- Formal Support for Untimed SystemC Specifications: Application to High-level SynthesisEugenio Villar, Fernando Herrera, Victor Fernández. 74-79
- Formal Verification of Timed VHDL ProgramsAbdelrezzak Bara, Pirouz Bazargan-Sabet, Remy Chevallier, Dominique Ledu, Emmanuelle Encrenaz, Patricia Renault. 80-85
- Tiny-Pi: A Novel Formal Method for Specification, Analysis and Verification of Dynamic Partial Reconfiguration ProcessesAndré Seffrin, Alexander Biedermann, Sorin A. Huss. 86-91
- Modeling of Communication Infrastructure for Design-Space ExplorationFranco Fummi, Davide Quaglia, Francesco Stefanni, Giovanni Lovato. 92-97
- Mixed-Level Simulation of Wireless Sensor NetworksJan Haase, Mario Lang, Christoph Grimm. 99-104
- SystemC-A Modelling of Mixed-Technology Systems with Distributed BehaviourChenxu Zhao, Tom J. Kazmierski. 105-110
- Mixed Signal Simulation with SystemC and SaberTobias Kirchner, Nico Bannow, Christian Kerstan, Christoph Grimm. 111-116
- HetMoC: Heterogeneous Modelling in SystemCJun Zhu, Ingo Sander, Axel Jantsch. 117-122
- A Theoretical and Experimental Review of SystemC Front-endsKevin Marquet, Bageshri Karkare, Matthieu Moy. 124-129
- A Dynamic Load Balancing Method for Parallel Simulation of Accuracy Adaptive TLMsRauf Salimi Khaligh, Martin Radetzki. 130-135
- Modeling Technique for Simulation Time Speed-up of Performance Computation in Transaction Level ModelsSébastien LeNours, Anthony Barretau, Olivier Pasquier. 136-141
- SystemC Architectural Transaction Level Modelling for Large NoCsMohammad Hosseinabady, José L. Núñez-Yáñez. 142-147
- Bottom-up Verification Methodology for CMOS Photonic Linear Heterogeneous SystemBo Wang, Ian O Connor, Emmanuel Drouard, Lioula Labrak. 149-154
- VHDL-AMS model of RF-Interconnect System for Global On-Chip CommunicationMarie Rouvière, Emmanuelle Bourdel, Sébastien Quintanel, Bertrand Granado. 155-158
- Towards Abstract Analysis Techniques for Range Based System SimulationsFlorian Schupfer, Christoph Grimm, Markus Olbrich, Michael Kärgel, Erich Barke. 159-164
- Genetic-Based High-Level Synthesis of Sigma-Delta Modulator in SystemC-AChenxu Zhao, Tom J. Kazmierski. 165-170
- Synthesis of Glue Logic, Transactors, Multiplexors and Serialisors from Protocol SpecificationsDavid Greaves, M. J. Nam. 171-177
- Exercises in Architecture Specification Using CLaSHJan Kuper, Christiaan Baaij, Matthijs Kooijman. 178-183
- SyReC: A Programming Language for Synthesis of Reversible CircuitsRobert Wille, Sebastian Offermann, Rolf Drechsler. 184-189
- Functional Abstractions for UML Activity DiagramsMatthias Brettschneider, Tobias Häberlein. 191-196
- Formal Foundations for MARTE-SystemC InteroperabilityPablo Peñil, Fernando Herrera, Eugenio Villar. 197-202
- An Architecture for Deploying Model Based Testing in Embedded SystemsPadma Iyenghar, Clemens Westerkamp, Juergen Wuebbelmann, Elke Pulvermueller. 203-208
- Towards High-Level Executable Specifications of Heterogeneous Systems with SystemC-AMS: Application to a Manycore PCR-CE Lab on Chip for DNA SequencingFrançois Pêcheux, Amer Habib. 210-215
- Modeling Switched Capacitor Sigma Delta Modulator Nonidealities in SystemC-AMSSumit Adhikari, Christoph Grimm. 216-221
- Design of Experiments for Reliable Operation of Electronics in Automotive ApplicationsMonica Rafaila, Jérôme Kirscher, Christian Decker, Georg Pelz, Christoph Grimm. 222-227
- Using SystemCAMS for Heterogeneous Systems Modelling at TIER-1 LevelThomas Arndt, Thomas Uhle, Karsten Einwich, Ingmar Neumann. 228-233
- An Accelerated Mixed-Signal Simulation Kernel for SystemCDaniel Zaum, Stefan Hoelldampf, Markus Olbrich, Erich Barke, Ingmar Neumann. 234-239
- Logical Time at Work: Capturing Data Dependencies and Platform ConstraintsCalin Glitia, Julien DeAntoni, Frédéric Mallet. 241