Abstract is missing.
- Selective abstraction and stochastic methods for scalable power modelling of heterogeneous systemsAshur Rafiev, F. Xia, Alexei Iliasov, Rem Gensh, Ali Aalsaud, Alexander Romanovsky, Alexandre Yakovlev. 1-7 [doi]
- Building product-lines of mixed-criticality systemsSimon Barner, Alexander Diewald, Fernando Eizaguirre, Anatoly Vasilevskiy, Franck Chauvel. 1-8 [doi]
- Automated synthesis of cyber-physical systems from joint controller/architecture specificationsDebayan Roy, Licong Zhang, Wanli Chang, Samarjit Chakraborty. 1-8 [doi]
- Heterogeneous computing with accelerators: an overview with examplesAna Lucia Varbanescu, Jie Shen. 1-8 [doi]
- Comprehensive non-functional analysis of combinational circuits vulnerability to single event transientsGhaith Bany Hamad, Ghaith Kazma, Otmane Aït Mohamed, Yvon Savaria. 1-7 [doi]
- Fault-effect analysis on system-level hardware modeling using virtual prototypesBogdan-Andrei Tabacaru, Moomen Chaari, Wolfgang Ecker, Thomas Kruse, Cristiano Novello. 1-7 [doi]
- On the application of formal fault localization to automated RTL-to-TLM fault correspondence analysis for fast and accurate VP-based error effect simulation - a case studyVladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler. 1-8 [doi]
- Maintenance of specification models in industry using EdaptY. Vissers, J. G. M. Mengerink, Ramon R. H. Schiffelers, Alexander Serebrenik, Michel A. Reniers. 1-6 [doi]
- Flexible runtime verification based on logical clock constraintsDaian Yue, Vania Joloboff, Frédéric Mallet. 1-8 [doi]
- Using event-B and Modelica to evaluate thermal management strategies in many core systemsColin F. Snook, Tom J. Kazmierski. 1-5 [doi]
- Modeling legacy code with BIP: how to reduce the gap between formal description and real-time implementationBriag Le Nabec, Belgacem Ben Hedia, Jean-Philippe Babau, Mathieu Jan, Hela Guesmi. 1-8 [doi]
- IP-XACT for smart systems design: extensions for the integration of functional and extra-functional modelsSara Vinco, Michele Lora, Enrico Macii, Massimo Poncino. 1-8 [doi]
- Toolchain integration of runtime variability and aging awareness in multicore platformsRamakrishna Venkata Nittala, Francesco Barchi, Gianvito Urgese, Andrea Acquaviva. 1-8 [doi]
- Efficient probabilistic fault tree analysis of safety critical systems via probabilistic model checkingMarwan Ammar, Ghaith Bany Hamad, Otmane Aït Mohamed, Yvon Savaria. 1-8 [doi]
- Equivalence checking on ESL utilizing a priori knowledgeNiels Thole, Heinz Riener, Görschwin Fey. 1-8 [doi]
- A modular design space exploration framework for multiprocessor real-time systemsNima Khalilzad, Kathrin Rosvall, Ingo Sander. 1-7 [doi]
- Compositional specification of functionality and timing of manufacturing systemsBram van der Sanden, João Bastos, Jeroen Voeten, Marc Geilen, Michel A. Reniers, Twan Basten, Johan Jacobs, Ramon R. H. Schiffelers. 1-8 [doi]
- Error-free near-threshold adiabatic CMOS logic in presence of process variationYue Lu, Tom J. Kazmierski. 1-5 [doi]
- Change impact analysis for hardware designs from natural language to system levelMartin Ring, Jannis Stoppe, Christoph Lüth, Rolf Drechsler. 1-7 [doi]
- Feature based state space coverage of analog circuitsAndreas Furtig, Sebastian Steinhorst, Lars Hedrich. 1-7 [doi]
- Automatic generation of self-adaptive transactors from PSL assertionsFlorenc Demrozi, Graziano Pravadelli, Francesco Stefanni. 1-7 [doi]
- Designing reliable cyber-physical systems overview associated to the special session at FDL'16Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Görschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Könighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Röck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao. 1-8 [doi]
- Cascading metamodels from different sources for performance analysis of a power moduleChristine Forster, Stefan Buschhorn, Monica Rafaila, Linus Maurer, Georg Pelz. 1-8 [doi]