Abstract is missing.
- Building trusted ICs using split fabricationKaushik Vaidyanathan, Bishnu P. Das, H. Ekin Sumbul, Renzhi Liu, Larry Pileggi. 1-6 [doi]
- Split-fabrication obfuscation: Metrics and techniquesMeenatchi Jagasivamani, Peter Gadfort, Michel Sika, Michael Bajura, Michael Fritze. 7-12 [doi]
- Efficient and secure intellectual property (IP) design with split fabricationKaushik Vaidyanathan, Renzhi Liu, H. Ekin Sumbul, Qiuling Zhu, Franz Franchetti, Larry Pileggi. 13-18 [doi]
- Verification of untrusted chips using trusted layout and emission measurementsFranco Stellari, Peilin Song, Alan J. Weger, Jim Culp, A. Herbert, Dirk Pfeiffer. 19-24 [doi]
- Cryptographically secure shieldsJean-Michel Cioranesco, Jean-Luc Danger, Tarik Graba, Sylvain Guilley, Yves Mathieu, David Naccache, Xuan Thuy Ngo. 25-31 [doi]
- Side-channel leakage on silicon substrate of CMOS cryptographic chipDaisuke Fujimoto, Daichi Tanaka, Noriyuki Miura, Makoto Nagata, Yu-ichi Hayashi, Naofumi Homma, Shivam Bhasin, Jean-Luc Danger. 32-37 [doi]
- On design of a highly secure PUF based on non-linear current mirrorsRaghavan Kumar, Wayne Burleson. 38-43 [doi]
- Entropy loss in PUF-based key generation schemes: The repetition code pitfallPatrick Koeberl, Jiangtao Li 0001, Anand Rajan, Wei Wu. 44-49 [doi]
- Composite PUF: A new design paradigm for Physically Unclonable Functions on FPGADurga Prasad Sahoo, Sayandeep Saha, Debdeep Mukhopadhyay, Rajat Subhra Chakraborty, Hitesh Kapoor. 50-55 [doi]
- A look into SIMON from a side-channel perspectiveShivam Bhasin, Tarik Graba, Jean-Luc Danger, Zakaria Najm. 56-59 [doi]
- Increasing the efficiency of laser fault injections using fast gate level reverse engineeringFranck Courbon, Philippe Loubet-Moundi, Jacques J. A. Fournier, Assia Tria. 60-63 [doi]
- IP-level implementation of a resistance-based physical unclonable functionDylan Ismari, Jim Plusquellic. 64-69 [doi]
- Security of SoC firmware load protocolsSava Krstic, Jin Yang, David W. Palmer, Randy B. Osborne, Eran Talmor. 70-75 [doi]
- A hierarchical formal approach to verifying side-channel resistant cryptographic processorsKotaro Okamoto, Naofumi Homma, Takafumi Aoki, Sumio Morioka. 76-79 [doi]
- Optimality and beyond: The case of 4×4 S-boxesStjepan Picek, Baris Ege, Kostas Papagiannopoulos, Lejla Batina, Domagoj Jakobovic. 80-83 [doi]
- EM-based detection of hardware trojans on FPGAsOliver Soll, Thomas Korak, Michael Muehlberghuber, Michael Hutter. 84-87 [doi]
- Robust keys from physical unclonable functionsMerrielle Spain, Benjamin Fuller, Kyle Ingols, Robert Cunningham. 88-92 [doi]
- Side-channel countermeasure for SHA-3 at almost-zero area overheadMostafa M. I. Taha, Patrick Schaumont. 93-96 [doi]
- A frequency leakage model for SCASébastien Tiran, S. Ordas, Yannick Teglia, Michel Agoyan, Philippe Maurine. 97-100 [doi]
- Bit selection algorithm suitable for high-volume production of SRAM-PUFKan Xiao, Md. Tauhidur Rahman, Domenic Forte, Yu Huang 0005, Mei Su, Mohammad Tehranipoor. 101-106 [doi]
- Hardware trojan detection by symmetry breaking in path delaysNorimasa Yoshimizu. 107-111 [doi]
- Experimental evaluation of two software countermeasures against fault attacksNicolas Moro, Karine Heydemann, Amine Dehbaoui, Bruno Robisson, Emmanuelle Encrenaz. 112-117 [doi]
- NREPO: Normal basis Recomputing with Permuted OperandsXiaofei Guo, Debdeep Mukhopadhyay, Chenglu Jin, Ramesh Karri. 118-123 [doi]
- A noise bifurcation architecture for linear additive physical functionsMeng-Day (Mandel) Yu, David M'Raïhi, Ingrid Verbauwhede, Srinivas Devadas. 124-129 [doi]
- Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeterLoic Zussa, Jean-Max Dutertre, Jessy Clédière, Bruno Robisson. 130-135 [doi]
- Power supply glitch attacks: Design and evaluation of detection circuitsKamil Gomina, Jean-Baptiste Rigaud, Philippe Gendrier, Philippe Candelier, Assia Tria. 136-141 [doi]
- New scan attacks against state-of-the-art countermeasures and DFTSk Subidh Ali, Ozgur Sinanoglu, Samah Mohamed Saeed, Ramesh Karri. 142-147 [doi]
- Countering the effects of silicon aging on SRAM PUFsRoel Maes, Vincent van der Leest. 148-153 [doi]
- DWM-PUF: A low-overhead, memory-based security primitiveAnirudh Iyengar, Kenneth Ramclam, Swaroop Ghosh. 154-159 [doi]
- A Chaotic Ring oscillator based Random Number GeneratorSiva Nishok Dhanuskodi, Arunkumar Vijayakumar, Sandip Kundu. 160-165 [doi]