Table of Contents

• A new dual-X CMOS second generation current conveyor (DXCCII)Firat Kaçar, Hakan Kuntman. 1-4 [doi]
• A novel two quadrant MOS translinear Squarer-divider cellCarlos Aristoteles De La Blas, Antonio Lopez. 5-8 [doi]
• SoC design challenges in the deep-sub micron eraNeeraj Paliwal. 7-8 [doi]
• Device-mismatch-insensitive current dividerChunyan Wang. 9-12 [doi]
• The third revolution in semiconductor packaging and system integrationCarlo Cognetti. 9-10 [doi]
• Information technology applications of statistical nonlinear dynamicsGianluca Setti. 11-12 [doi]
• Metal oxide nanowires gas sensorsElisabetta Comini. 13-15 [doi]
• Transconductance enhancement in bulk-driven input stagesJuan Manuel Carrillo, J. Francisco Duque-Carrillo, Guido Torelli. 13-16 [doi]
• High-performance chip-to-chip signalingAnthony Chan Carusone. 16 [doi]
• μBUILDER: The easy and low cost road to advanced microsystemsC. Grinde, C. Welham. 17-18 [doi]
• A pseudo-differential transmitting circuit causing reduced common-mode current variationsFrédéric Broydé, Evelyne Clavelier. 17-20 [doi]
• The design of active RC filters for the Analog Front End of IC communication systemsGeorge S. Moschytz. 19-20 [doi]
• Fundamentals of wireless networks systemsMohammad S. Obaidat. 21-22 [doi]
• A clock boosting scheme for low voltage circuitsAmirehsan Behradfar, Saeed Zeinolabedinzadeh, Khosrow Hajsadeghi. 21-24 [doi]
• Lab-on-Chip based diagnostic tools: Microfluidic structures on top of CMOS devicesMohamad Sawan, Ebrahim Ghafar-Zadeh. 23-24 [doi]
• On the probability distribution of fixed-point multiplicationArash Ahmadi, Mark Zwolinski. 25-28 [doi]
• Chip level security: Why ? How ?Régis Leveugle. 25-26 [doi]
• Low error truncated multipliers for DSP applicationsValeria Garofalo, Nicola Petra, Davide De Caro, Antonio G. M. Strollo, Ettore Napoli. 29-32 [doi]
• High-speed and low-power multipliers using the Baugh-Wooley algorithm and HPM reduction treeMagnus Själander, Per Larsson-Edefors. 33-36 [doi]
• A modified architecture for Optimal Normal Basis multiplication based on pre-computationRichard Cupples, Omar Nibouche, Ahmed Bouridane. 37-40 [doi]
• Constant multiplier design using specialized bit pattern addersKyung-Ju Cho, Suhyun Jo, Yong-Eun Kim, Yi-Nan Xu, Jin-Gyun Chung. 41-44 [doi]
• DSP CAVLC implementation and optimization for H.264/AVC baseline encoderTaheni Dammak, Imen Werda, Amine Samet, Nouri Masmoudi. 45-48 [doi]
• Adaptive blind compensation of gain and timing mismatches in M-channel time-interleaved ADCsChristian Vogel, Shahzad Saleem, Stefan Mendel. 49-52 [doi]
• Addressing technique for parallel memory accessing in radix-2 FFT processorsKonstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos. 53-56 [doi]
• Implementation of QR decomposition for MIMO-OFDM detection systemsKuang-Hao Lin, Robert C. Chang, Alex Chien-Lin Huang, Feng-Chi Chen, Shih-Chun Lin. 57-60 [doi]
• Architecture for reconfigurable MIMO detector and its FPGA implementationPankaj Bhagawat, Rajballav Dash, Gwan Choi. 61-64 [doi]
• Relation of gap length and resonant frequency about a double-coil drive type IH cookerHideki Okuno, Hironobu Yonemori, Miki Kobayashi. 65-68 [doi]
• A fuel cell-based hybrid power supply for portable electronics devicesValeria Boscaino, Giuseppe Capponi, Patrizia Livreri, Filippo Marino. 69-72 [doi]
• Modelling TrenchMOSFETs in SPICEJanusz Zarebski, Krzysztof Górecki. 73-76 [doi]
• Passive shaping of line current waveform by converter with alternating of parallel and series resonance in AC-DC switch mode power suppliesKuno Janson, Viktor Bolgov, Lauri Kutt, Ants Kallaste, Heigo Molder. 77-80 [doi]
• A fully-integrated semicircular canal processor for an implantable vestibular prosthesisTimothy G. Constandinou, Julius Georgiou, Christofer Toumazou. 81-84 [doi]
• An electronic barrier system to improve blood transfusion safetyFederico Baronti, Andrea Lazzeri, Roberto Roncella, Michele Rubertelliy, Andrea Tomasi. 85-88 [doi]
• Direct detection of DNA sequences based on capacitance measurements through a configurable mixed-signal architectureLucia Bissi, Pisana Placidi, Michele Cicioni, Andrea Scorzoni, Fulvio Mancarella, Stefano Zampolli. 89-92 [doi]
• FPGA-based architecture for real-time synaptic plasticity computationBilel Belhadj, Jean Tomas, Olivia Malot, Gilles N'Kaoua, Yannick Bornat, Sylvie Renaud. 93-96 [doi]
• Acquiring regions of interest from diffuse optical tomography measurementsBuddhi Kanmani, Ram Mohan Vasu. 97-100 [doi]
• Circuit-based FDTD method for transient analysis of mutually coupled systemYuichi Tanji. 101-104 [doi]
• Diagnostic analysis of bandwidth mismatch in time-interleaved systemsAmir Zjajo. 105-108 [doi]
• Rectangular 3D wirelength distribution modelsRajeev K. Nain, Rajarshi Ray, Malgorzata Chrzanowska-Jeske. 109-112 [doi]
• Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based systemPierre Vanhauwaert, Michele Portolan, Régis Leveugle, Philippe Roche. 113-116 [doi]
• Limit cycle behavior in a class-AB second-order square root domain filterCarlos Aristoteles De la Cruz-Blas, Orla Feely. 117-120 [doi]
• A tunable active filter in CMOS for RF applicationsHakan Cetinkaya, Nil Tarim. 121-124 [doi]
• Cosmic ray detection from electromagnetic wave reflection using a matched filterLuciano Manhães de Andrade Filho, José M. de Seixas, Thiago C. Xavier. 125-128 [doi]
• High frequency log domain all pass filter based on KHN topologyRemzi Arslanalp, Abdullah T. Tola, Saziye Surav Yilmaz. 129-132 [doi]
• Realization of fully balanced filter using low power active inductorTakahide Sato, Shigetaka Takagi, Satoshi Ao, Nobuo Fujii. 133-136 [doi]
• Analysis of the impact of process variations on static logic circuits versus fan-inMassimo Alioto, Gaetano Palumbo, Melita Pennisi. 137-140 [doi]
• Optimum design of two-level MCML gatesGiuseppe Caruso, Alessio Macchiarella. 141-144 [doi]
• Design guidelines for high-speed Transmission-gate latches: Analysis and comparisonGaetano Palumbo, Melita Pennisi. 145-148 [doi]
• Design of a rad-hard library of digital cells for space applicationsAlberto Stabile, Valentino Liberali, Cristiano Calligaro. 149-152 [doi]
• High speed and ultra low voltage CMOS latchYngvar Berg, Omid Mirmotahari, Snorre Aunet. 153-156 [doi]
• A 65 nm CMOS - Stacked Folded Fully Differential (SFFD) PA structure for W-CDMA applicationYohann Luque, Nathalie Deltimple, Eric Kerherve, Didier Belot. 157-160 [doi]
• An over-voltage protection circuit for CMOS power amplifiersNiklas Zimmermann, Ralf Wunderlich, Stefan Heinen. 161-164 [doi]
• A 1V CMOS LNA for low power ultra-wideband systemsKarim Allidina, Mourad N. El-Gamal. 165-168 [doi]
• Implementation of dual-channel receiver suitable for 3G power amplifiers characterization in RF/Digital predistortion systemsJing Li, Oualid Hammi, Fadhel M. Ghannouchi. 169-172 [doi]
• Weighted criteria for RF power amplifiers identification in wide-band contextSonia Saied Bouajina, Meriem Jaïdane, Fadhel M. Ghannouchi. 173-176 [doi]
• Optimization of a piezoelectric energy harvester for environmental broadband vibrationsDario Paci, Monica Schipani, Valeria Bottarel, Daniele Miatton. 177-181 [doi]
• An integrated fault detector in high voltage technology for motor drive applicationsStefano Ruzza, Enrico Dallago, Giuseppe Venchi, Marco Giandalia, Sergio Morini, Davide Respigo. 182-185 [doi]
• Temperature dependence of the programmed states in GST-based multilevel phase-change memoriesAlessandro Cabrini, Andrea Fantini, Fabio Gallazzi, Guido Torelli. 186-189 [doi]
• Injection locked CMOS buffer dedicated to nanomagnetic based voltage controlled oscillatorFranck Badets, L. Lagae, Sven Cornelissen, Thibaut Devolder, Claude Chappert. 190-193 [doi]
• Design and fabrication of a miniaturized three-axis accelerometer for measuring heart wall motionCraig Lowrie, Marc P. Y. Desmulliez, Lars Hoff, Ole Jakob Elle, Erik Fosse. 194-197 [doi]
• MEMS-based blood cell counting systemNiccolò Piacentini, Danilo Demarchi, Pierluigi Civera, Marco Knaflitz. 198-201 [doi]
• On-glass digital-to-analog converter with gamma correction for panel data driverTzu-Ming Wang, Yu-Hsuan Li, Ming-Dou Ker. 202-205 [doi]
• Tunable micro-machined combline resonatorMatthieu Chatras, Dominique Baillargeat, Pierre Blondy. 206-209 [doi]
• Some applications of magnetic MEMSDavid Flynn, Marc P. Y. Desmulliez. 210-213 [doi]
• Implementation of AES algorithm resistant to differential power analysisMarek Strachacki, Stanislaw Szczepanski. 214-217 [doi]
• Protecting designs with a passive thermal tagCarol Marsh, Tom Kean, David McLaren. 218-221 [doi]
• Globally verifiable clone-resistant device identity with mutual authenticationWael Adi, Bassel Soudan. 222-225 [doi]
• An elliptic threshold signature framework for k-security in wireless sensor networksMaha Sliti, Mohamed Hamdi, Noureddine Boudriga. 226-229 [doi]
• Realization of the third-order high-pass transfer function with real zeroesNino Stojkovic, Marino Franusic, Mirko Dozet. 230-233 [doi]
• Sensitivity invariant sums of high-orderJacek Izydorczyk, Jan Chojcan. 234-237 [doi]
• A novel design methodology for current reference circuitsHassen Aziza, Emmanuel Bergeret, Annie Pérez. 238-241 [doi]
• Specialised excitation and wavelet feature extraction in fault diagnosis of analog electronic circuitsLukas Chruszczyk, Jerzy Rutkowski. 242-246 [doi]
• Tracing some temperature characteristics in diode-transistor circuits having multiple DC solutionsMichal Tadeusiewicz, Stanislaw Halgas. 247-250 [doi]
• New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplificationJoão P. Oliveira, João Goes, Nuno F. Paulino, Jorge Fernandes, Júlio Paisana. 251-254 [doi]
• Improvement of the architecture for MEMS resonator quality factor measurementMing Zhang, Nicolas Llaser, Hervé Mathias. 255-258 [doi]
• Design of a small area and low power CMOS D/A converter based on the Alpha-Power Law MOSFET modelDaeyoon Kim, Sanghoon Hwang, Heewon Kang, Seungjin Yeo, Dubok Lee, Junho Moon, Minkyu Song. 259-262 [doi]
• A method for stability compensation of low-load-capacitor low-power LDOSajal Kumar Mandal. 263-266 [doi]
• 4-bit 2-Gsample/s flash A/D converter using latched-skewed-logic in 0.13um CMOSJong-Ho Lee, Yun-Jeong Kim, Suki Kim, Kwang-Hyun Baek. 267-270 [doi]
• Sallen-Key polyphase filter designMarkus Robens, Ralf Wunderlich, Stefan Heinen. 271-274 [doi]
• Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integratorMehdi Azadmehr, Yngvar Berg, Omid Mirmotahari. 275-278 [doi]
• Synchronizers based on carrier phase lock Loop and on symbol phase lock loopAntonio D. Reis, José F. Rocha, Atílio Manuel da Silva Gameiro, José P. Carvalho. 279-282 [doi]
• A high-speed and precise current sensing circuit with bulk control (CCB) techniqueChi-Lin Chen, Wei-Lun Hsieh, Wei-Jen Lai, Ke-Horng Chen, Ching-Sung Wang. 283-287 [doi]
• Reconfigurable A/D - D/A converter and its use in pipelined A/D convertersCristian E. Onete. 288-291 [doi]
• Design of a reference voltage for A/D convertersAssia Hamouda, Rabia Ouchen, Nour-Eddine Bouguechal, Rüdiger Arnold, A. Wiener, Otto Manck. 292-295 [doi]
• Design of current-mode gm-C MLF elliptic filters for wireless receiversXi Zhu, Yichuang Sun, James Moritz. 296-299 [doi]
• A CMOS 80mW 400MHz seventh-order MLF FLF linear phase filter with gain boostXi Zhu, Yichuang Sun, James Moritz. 300-303 [doi]
• Finding all the operating points in piecewise-linear electrical networks: An iterative-decomposed approachVictor Jimenez-Fernandez, Luis Hernández-Martínez, Arturo Sarmiento-Reyes, Miguel Ángel Gutiérrez de Anda, Maria Teresa Sanz. 304-307 [doi]
• Piecewise linear curvature-compensated CMOS bandgap referenceHong-Yi Huang, Ru-Jie Wang, Shih-Chiang Hsu. 308-311 [doi]
• Simultaneous bidirectional transceiver with impedance matchingHong-Yi Huang, Ruei-Iun Pu, Ming-Ta Lee. 312-315 [doi]
• A fast settling and low reference spur PLL with double sampling phase detectorGuo-Jue Huang, Che-Sheng Chen, Wen-Shen Wuen, Kuei-Ann Wen. 316-319 [doi]
• Design method for CNN Gabor-type filtersRadu Matei. 320-323 [doi]
• Resistorless tuneable KHN-filter in current mode with CCCIIs and grounded capacitorsSerhan Yamaçli, Sadri Özcan, Hakan Kuntman. 324-327 [doi]
• Complex mismatch shaper for tree-structured DAC in multi-bit complex sigma-delta modulatorsSong-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen. 328-331 [doi]
• Automatic impedance control for chip-to-chip interconnectionsEdgar López-Delgadillo, Miguel Angel Garcia-Andrade, J. Alejandro Diaz-Mendez, Franco Maloberti. 332-335 [doi]
• The hydrid model for SAW filterTrang Hoang, Patrice Rey, Marie-Helene Vaudaine, Philippe Robert, Philippe Benech. 336-339 [doi]
• A 1-V 10-bit 2GSample/s D/A converter based on precision current reference in 90-nm CMOSKuo-Hsing Cheng, Hsin-Hao Wang, Ding-Jyun Huang. 340-343 [doi]
• A fully differential layout placement paradox: Matching vs. full symmetryHakan Binici, Juha Kostamovaara. 344-347 [doi]
• Shaping of bidimensional distributed structuresAnton Manolescu, Anca Manuela Manolescu. 348-351 [doi]
• Flexible escape routing for flip-chip designsJin-Tai Yan, Zhi-Wei Chen. 352-355 [doi]
• An efficient method for simulation of multiple catastrophic faultsMichal Tadeusiewicz, Stanislaw Halgas. 356-359 [doi]
• Simulation-equation-based methodology for design of CMOS amplifiers using Geometric ProgrammingMohammad Hossein Maghami, Farzad Inanlou, Reza Lotfi. 360-363 [doi]
• A new dynamic differential logic style as a countermeasure to power analysis attacksLuca Giancane, Piero Marietti, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti. 364-367 [doi]
• Hardware implementation of a DCT watermark for CMOS image sensorsYonatan Shoshan, Alexander Fish, Graham A. Jullien, Orly Yadid-Pecht. 368-371 [doi]
• A simplified approach for designing secure Random Number Generators in HWXin Li, Yonatan Shoshan, Alexander Fish, Graham A. Jullien. 372-375 [doi]
• Design of a 2 μW RFID baseband processor featuring an AES cryptography primitiveAndrea Ricci, Matteo Grisanti, Ilaria De Munari, Paolo Ciampolini. 376-379 [doi]
• The AES in a systolic fashion: Implementation and results of Celator processorDaniele Fronte, Annie Pérez, Eric Payrat. 380-383 [doi]
• Improved lock-time in all-digital phase-locked loops due to binary search acquisitionStefan Mendel, Christian Vogel. 384-387 [doi]
• An ADPLL-based fast start-up technique for sensor radio frequency synthesizersLiangge Xu, Saska Lindfors, Jussi Ryynänen. 388-391 [doi]
• A current shaping technique to lower phase noise in LC oscillatorsJian Chen, Fredrik Jonsson, Håkan Olsson, Li-Rong Zheng, Dian Zhou. 392-395 [doi]
• A novel heuristic for the optimal design of LC voltage controlled oscillatorsIbtihel Krout, Hassène Mnif, Mourad Fakhfakh, Mourad Loulou. 396-399 [doi]
• A low-voltage low-noise superharmonic quadrature oscillatorSasan Naseh, Malihe Zarre Dooghabadi, M. Jamal Deen. 400-403 [doi]
• MPSoC design of RT control applications based on FPGA SoftCore processorsSlim Ben Othman, Ahmed Karim Ben Salem, Slim Ben Saoud. 404-409 [doi]
• Tighter WCET analysis of input dependent programs with classified-cache memory architectureYanhui Li, Shakith Fernando, Heng Yu, Xiaolei Chen, Yajun Ha, Teng Tiow Tay. 410-413 [doi]
• Software BIST capabilities of a symmetric cipherPaolo Maistri, Cyril Excoffon, Régis Leveugle. 414-417 [doi]
• PAMPR: Power-aware and minimum path routing algorithm for NoCsMohammadreza Binesh Marvasti, Masoud Daneshtalab, Ali Afzali-Kusha, Siamak Mohammadi. 418-421 [doi]
• Reducing SoC electromagnetic emissions by designFranco L. Fiori. 422-425 [doi]
• Design methodology for a dithered reduced complexity Digital MASH Delta-Sigma ModulatorZhipeng Ye, Michael Peter Kennedy. 426-429 [doi]
• Multibit CT SD modulators with pulse width modulation and FIR-DAC in the feedback pathFrancisco Coldro, A. Torralba. 430-433 [doi]
• A configurable architecture for implementing sigma-delta modulatorsCarolina Mora, Jordi Cosp. 434-437 [doi]
• Continuous-time quadrature bandpass sigma-delta modulator with capacitive feedforward summation for GSM/EDGE low-IF receiverSong-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen. 438-441 [doi]
• A low power sub 1V 3.5-ppm/°C voltage reference featuring subthreshold MOSFETsT. Shihabudheen, V. Suresh Babu, M. R. Baiju. 442-445 [doi]
• A dual-phase charge pump regulator with nano-ampere switched-capacitor CMOS voltage reference for achieving low output ripplesYean-Kuo Luo, Ke-Horng Chen, Wei-Chou Hsu. 446-449 [doi]
• A micropower low-dropout regulator with a programmable on-chip load capacitor for a low-power capacitive sensor interfaceMatti Paavola, Mika Kämäräinen, Mikko Saukoski, Kari Halonen. 450-453 [doi]
• A design-oriented mathematical model for DC/DC buck converters with PFM controlAlessio Facen, Matteo Tonelli, Andrea Boni. 454-457 [doi]
• A high-accuracy and high-efficiency on-chip current sensing for current-mode control CMOS DC-DC buck converterKuo-Hsing Cheng, Chia-Wei Su, Hsin-Hsin Ko. 458-461 [doi]
• The grid-based two-layer routing algorithm suitable for cell/IP-based circuit designChia-Jung Liu, Yi-Chen Lin, Jiann-Chyi Rau. 462-465 [doi]
• DLX HOTOKADA: A design and implementation of a 32-bit dual core capable DLX microprocessor with single level cacheDarryl Aldrin M. Dioquino, Katrina Joy S. Rosario, Homer F. Supe, Jestoni V. Zarsuela, Anastacia P. Ballesil, Joy Alinda Reyes. 466-469 [doi]
• Mixed-signal baseband processing chain for a MB-OFDM receiverJanne Maunu, Mika Laiho, Tero Koivisto, Kati Virtanen, Mikko Pänkäälä, Ari Paasio. 470-473 [doi]
• Co-simulation of SystemC TLM with RTL HDL for surveillance camera system verificationJeongwoo Park, Bongchun Lee, Kyu-sam Lim, Jeong Hun Kim, Suki Kim, Kwang-Hyun Baek. 474-477 [doi]
• Low latency and high accuracy archtectures of cordic algorithm for cosine calculation on FPGAGadgil Amruta, Parthe Yogita, Pathak Puja, P. V. Sriniwas Shastry. 478-481 [doi]
• Digital oscillator circuit using synchronous pulse drivingTomás Roubicek, Stanislav Dado. 482-485 [doi]
• High-speed and memory-efficient architecture for 2-D 1-Level discrete wavelet transformHui Hou, Wei Cao, Fan-jiong Zhang, Jinmei Lai, Jiarong Tong. 486-489 [doi]
• A new systolic array algorithm for a high throughput low cost VLSI implementation of DCTDoru-Florin Chiper, M. N. S. Swamy, M. Omair Ahmad. 490-493 [doi]
• A software performance simulation methodology for rapid system architecture explorationChristoph M. Kirchsteiger, Harald Schweitzer, Christoph Trummer, Christian Steger, Reinhold Weiss, Markus Pistauer. 494-497 [doi]
• CMOS bulk input current switch logic circuitHong-Yi Huang, Chun-Tsai Hung, Sheng-Chia Chiang. 498-501 [doi]
• Orientation-selective digital filters based on 1D prototypesRadu Matei. 502-505 [doi]
• Phoneme recognition using neural networksDenise Vassallo, Edward Gatt. 506-509 [doi]
• Architecture of the integrated electronics for a wireless endoscopic capsule with locomotive and sensing and actuating capabilitiesAnna Arbat, Josep Samitier, Ángel Diéguez, Pietro Valdastri. 510-513 [doi]
• A time multiplexed architecture for neural networks using quantum devicesPeter M. Kelly, Liam McDaid, Fergal Tuffy, T. Martin McGinnity. 514-517 [doi]
• On-chip clock network using interconnected and coupled ring oscillatorsManuel Salim Maza, Oscar Gonzalez Diaz, Mónico Linares Aranda. 518-521 [doi]
• C-based hardware-accelerator coprocessing for SOC an quantitative area-performance evaluationZhoukun Wang, Omar Hammami. 522-525 [doi]
• A novel test environment for template based QDI asynchronous circuitsAli-Asghar Salehpour, Masoud Zamani, Amir-Mohammad Rahmani, Siamak Mohammadi, Hossein Pedram, Mohammadreza Binesh Marvasti. 526-529 [doi]
• Online neural filtering operating over segmented discriminating componentsEduardo F. Simas Filho, José Manoel de Seixas, Luiz Pereira Calôba. 530-533 [doi]
• Flexible-length Fast Fourier Transform for COFDMKrittanon Chalermsuk, Robert H. Spaanenburg, Lambert Spaanenburg, Mark Seutter, Hans Stoorvogel. 534-537 [doi]
• Analysis of elementary multi-source networks employing TCP/IP congestion controlStefanos Politis, Paul Curran. 538-541 [doi]
• H-tree CMOS logic circuitShun-Wen Cheng. 542-545 [doi]
• A compact and low-power SRAM with improved read static noise marginCihun-Siyong Alex Gong, Ci-Tong Hong, Kai-Wen Yao, Muh-Tian Shiue, Kuo-Hsing Cheng. 546-549 [doi]
• Instruction level test for parallel multipliersMa Lin, Gao Yan. 550-553 [doi]
• An innovative sub-32nm SRAM voltage sense amplifier in double-gate CMOS insensitive to process variations and transistor mismatchPiotr Nasalski, Adam Makosiej, Bastien Giraud, Andrei Vladimirescu, Amara Amara. 554-557 [doi]
• Design considerations for an ultra-low voltage amplifier with high EMI immunityAnna Richelli. 558-561 [doi]
• A 1-V CMOS audio amplifier for low cost hearing aidsCristiano Azzolini, Andrea Boni. 562-565 [doi]
• Use of chopper-notch modulator in chopper amplifiers for replica images cancellationFrancesco Geusa, Andrea Agnes, Franco Maloberti. 566-569 [doi]
• Low power SC CMFB folded cascode OTA optimizationHouda Daoud, Sameh Bennour, Samir Ben Salem, Mourad Loulou. 570-573 [doi]
• GALEOR: Leakage reduction for CMOS circuitsSrikanth Katrue, Dhireesha Kudithipudi. 574-577 [doi]
• Energy evaluation in RLC tree circuits with exponential inputMassimo Alioto, Gaetano Palumbo, Massimo Poli. 578-581 [doi]
• Experimental methodology for power characterization of FPGAsIgnacio Herrera-Alzu, Miguel Angel Sánchez, Marisa López-Vallejo, Pedro Echeverría. 582-585 [doi]
• DEC ECC design to improve memory reliability in Sub-100nm technologiesRiaz Naseer, Jeff Draper. 586-589 [doi]
• A self-disable sense technique with differential NAND cell for content-addressable memoriesChi-Chun Huang, Jun-Han Wu, Chua-Chin Wang. 590-593 [doi]
• Low-power signal acquisition for galileo satellite navigation systemTero Partanen, Harri Sorokin, Jarmo Takala. 594-597 [doi]
• A digital signal processing based Ka band satellite beacon receiverCornelis Jan Kikkert, Owen P. Kenny. 598-601 [doi]
• On the use of signed digit arithmetic for the new 6-inputs LUT based FPGAsGian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano. 602-605 [doi]
• A high-performance reconfigurable 2-D transform architecture for H.264Wei Cao, Hui Hou, Jinmei Lai, Jiarong Tong, Hao Min. 606-609 [doi]
• 64-QAM 4×4 MIMO decoders based on Successive Projection AlgorithmJosé Marín-Roig, Vicenc Almenar, Javier Valls, Ma José Canet. 610-613 [doi]
• AER filtering using GLIDER: VHDL cellular automata descriptionAlejandro Linares-Barranco, José Luis Sevillano, Mohammad S. Obaidat, Néstor Ferrando, Joaquín Cerdá, D. Cascado, G. Jimenez, Antón Civit. 614-617 [doi]
• Fast charging technique for Li-Ion battery chargerChia-Hsiang Lin, Chi-Lin Chen, Yu-Huei Lee, Shih-Jung Wang, Chun-Yu Hsieh, Hong-Wei Huang, Ke-Horng Chen. 618-621 [doi]
• An exact, high-efficiency PFM DC-DC boost converter with dynamic stored energyHou-Ming Chen, Robert C. Chang, Pui-Sun Lei. 622-625 [doi]
• On the design of single-inductor double-output DC-DC buck, boost and buck-boost convertersMassimiliano Belloni, Edoardo Bonizzoni, Franco Maloberti. 626-629 [doi]
• The method of a fast electrothermal transient analysis of a buck converterKrzysztof Górecki, Janusz Zarebski. 630-633 [doi]
• An ultra-low power consumption 1-V, 10-bit succesive approximation ADCAlberto Rodriguez-Perez, Manuel Delgado-Restituto, Jesús Ruiz-Amaya, Fernando Manuel Medeiro Hidalgo. 634-637 [doi]
• A 1.8V 6-bit 1GS/s 60mW CMOS folding/interpolation ADC using folder reduction circuit and auto switching encoderJunho Moon, Heewon Kang, Daeyoon Kim, Seungjin Yeo, Dubok Lee, Minkyu Song. 638-641 [doi]
• A power-efficient capacitor structure for high-speed charge recycling SAR ADCsYan Zhu 0001, U. Fat Chio, He Gong Wei, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins. 642-645 [doi]
• A reconfigurable successive approximation ADC in 0.18μm CMOS technologyKang-Qiao Zhao, Saifullah Amir, Xiao-Zhou Meng, Muhammad Ali, Martin Gustafsson 0002, Mohammed Ismail, Ana Rusu. 646-649 [doi]
• A two-bit-per-cycle successive-approximation ADC with background offset calibrationMichele Casubolo, Marco Grassi, Andrea Lombardi, Franco Maloberti, Piero Malcovati. 650-653 [doi]
• Fast wire length estimation in obstructive block placementShuting Li, Tan Yan, Yasuhiro Takashima, Hiroshi Murata. 654-657 [doi]
• Simultaneous assignment of power pads and wires for reliability-driven hierarchical power quad-gridsJin-Tai Yan, Zhi-Wei Chen. 658-661 [doi]
• Thermal-driven white space redistribution for block-level floorplansJin-Tai Yan, Zhi-Wei Chen, Yi-Hsiang Chou, Shun-Hua Lin, Herming Chiueh. 662-665 [doi]
• Optimization on NMOS-based power-rail ESD clamp circuits with gate-driven mechanism in a 0.13-μm CMOS technologyShih-Hung Chen, Ming-Dou Ker. 666-669 [doi]
• Reliability analysis of logic circuits based on signal probabilityDenis Teixeira Franco, Maí Correia Vasconcelos, Lirida A. B. Naviner, Jean-François Naviner. 670-673 [doi]
• Object-oriented approach to video compression via Cellular Neural NetworksPietro Vecchio, Giuseppe Grassi, Donato Cafagna. 674-677 [doi]
• A VLSI network of spiking neurons with plastic fully configurable "stop-learning" synapsesMassimiliano Giulioni, Patrick Camilleri, Vittorio Dante, Davide Badoni, Giacomo Indiveri, Jochen Braun, Paolo Del Giudice. 678-681 [doi]
• Implementing homeostatic plasticity in VLSI networks of spiking neuronsChiara Bartolozzi, Olga Nikolayeva, Giacomo Indiveri. 682-685 [doi]
• Chaos in the fractional Chua and Chen systems with lowest-orderDonato Cafagna, Giuseppe Grassi, Pietro Vecchio. 686-689 [doi]
• A novel baseline holder circuit for nuclear imaging front-end electronicsFrancesco Corsi, Maurizio Foresta, Cristoforo Marzocca, Gianvito Matarrese, Arturo Tauro. 690-693 [doi]
• n + 1 multi-operand addersHaridimos T. Vergos, Dimitris Bakalis, Costas Efstathiou. 694-697 [doi]
• Constrained piecewise polinomial approximation for hardware implementation of elementary functionsAntonio G. M. Strollo, Davide De Caro, Nicola Petra, Ettore Napoli, Valeria Garofalo. 698-701 [doi]
• Floating-point division and square root implementation using a Taylor-series expansion algorithmTaek-Jun Kwon, Jeff Sondeen, Jeff Draper. 702-705 [doi]
• A 32-bit carry lookahead adder design using complementary all-N-transistor logicGang-Neng Sung, Chun-Ying Juan, Chua-Chin Wang. 706-709 [doi]
• Digital implementation of cellular neural networksRyan Grech, Edward Gatt, Ivan Grech, Joseph Micallef. 710-713 [doi]
• Design of current reuse CMOS LC-VCOSherif Ahmed Saleh Mohamed, Maurits Ortmanns, Yiannos Manoli. 714-717 [doi]
• Utilization of MEMS Tunable Inductors in the design of RF voltage-controlled oscillatorsOwen Casha, Ivan Grech, Joseph Micallef, Edward Gatt, Dominique Morche, Bernard Viala, Jean-Philippe Michel, Pierre Vincent, Emeric de Foucauld. 718-721 [doi]
• A 2GHz 65nm CMOS digitally-tuned BAW oscillatorPierre Guillot, Pascal Philippe, Corinne Berland, Jean-François Bercher. 722-725 [doi]
• A comparison of bandwidth setting concepts for Q-enhanced LC-tanks in deep-sub micron CMOS processesDirk Bormann, Tobias D. Werth, Niklas Zimmermann, Ralf Wunderlich, Stefan Heinen. 726-729 [doi]
• Current Regulated Matrix Converter for Field Oriented Control of Permanent Magnet Synchronous MachinesAntoni Arias, Emiliano Aldabas, Montserrat Corbalan Fuertes, Carlos Ortega. 730-733 [doi]
• Sensorless Field Oriented Control with Matrix Converters and Surface Mount Permanent Magnet Synchronous MachinesAntoni Arias, Josep Pou, Jordi Zaragoza, Josep Balcells, Carlos Ortega. 734-737 [doi]
• Common mode voltage in DTC drives using matrix convertersCarlos Ortega, Antoni Arias, Cedric Caruana, Maurice Apap. 738-741 [doi]
• Permanent-magnet wind turbines control tuning and torque estimation improvementsEider Robles, Salvador Ceballos, Josep Pou, Antoni Arias, José Luis Martín, Pedro Ibañez. 742-745 [doi]
• Design and realization of smart speech processorsZygmunt Ciota. 746-749 [doi]
• High sensitivity potentiostat system for sub-micron bio-sensors impedance measurementsMarco Carminati, Giorgio Ferrari, Marco Sampietro. 750-753 [doi]
• A low noise front-end for multiplexed ENG recording using CMOS technologyJohn Taylor, Robert Rieger. 754-757 [doi]
• A 0.8-V 420nW CMOS switched-opamp switched-capacitor pacemaker front-end with a new continuous-time CMFBMojtaba Daliri, Mohammad Maymandi-Nejad. 758-761 [doi]
• A programmable 9-bit current sources design dedicated to cochlear implantNeila Rekik, Sinda Shabou, Ahmed Ben Hamida, Mounir Samet. 762-765 [doi]
• A novel soft error sensitivity characterization technique based on simulated fault injection and constrained association analysisWeiguang Sheng, Liyi Xiao, Zhigang Mao. 766-769 [doi]
• A constraint-driven methodology for placement of analog and mixed-signal integrated circuitsAmmar Nassaj, Jens Lienig, Göran Jerke. 770-773 [doi]
• Testing content addressable memories using instructions and march-like algorithmsLin Ma, Yunji Chen, Menghao Su, Zichu Qi, Heng Zhang, Weiwu Hu. 774-777 [doi]
• Power supply current testing in the production line of emergency luminaire circuitsMichael G. Dimopoulos, Dimitris K. Papakostas, Alexios Spyronasios, Alkis A. Hatzopoulos, Dimitrios K. Konstantinou. 778-781 [doi]
• Linear programming based design of reconfigurable network on chip on eFPGAXinyu Li, Omar Hammami. 782-785 [doi]
• A low jitter self-calibration PLL for 10Gbps SoC transmission links applicationKuo-Hsing Cheng, Yu-Chang Tsai, Kai-Wei Hong, Yen-Hsueh Wu. 786-789 [doi]
• A 2.64GHz wide range low power DLL-based frequency multiplier with CML circuits using adaptive body biasChih-Hsing Lin, Ching-Te Chiu. 790-793 [doi]
• Modelling the frequency sensitivity Kvco of a ring oscillatorFiras Kallel, Mourad Fakhfakh, Mourad Loulou, Soufiane Oumansour, Mohamed Halim Sbaa. 794-797 [doi]
• A wide-range DLL-based clock generator with phase error calibrationKuo-Hsing Cheng, Chia-Wei Su, Meng-Jhe Wu, Yu-Ling Chang. 798-801 [doi]
• A PLL with loop bandwidth enhancement for low-noise and fast-settling clock recoveryJulien Roche, Wenceslas Rahadjandrabe, Lahkdar Zady, Gaëtan Bracmard, Daniele Fronte. 802-805 [doi]
• A high-speed fully integrated optical receiver in standard 130nm CMOSFilip Tavernier, Michiel Steyaert. 806-809 [doi]
• Design an infrared wireless optical mouse system and a dual-band infrared receiverKyu-sam Lim, Kon-Woo Kwon, Hee Ju Park, Jeong Hun Kim, Suki Kim, Jun-Jea Sung, Kwang-Hyun Baek. 810-813 [doi]
• A zero crossing avoidance predistortion technique for polar transmittersPascal Philippe. 814-817 [doi]
• Chaos aided synchronization for asynchronous multi-user chaos-based DS-CDMAGeorges Kaddoum, Pascal Chargé, Daniel Roviras, Daniele Fournier-Prunaret. 818-821 [doi]
• RS turbo codes with erasures for broad-band power line communicationFatma Rouissi, Fethi Tlili, Adel Ghazel, Virginie Degardin, Martine Lienard. 822-825 [doi]
• A design method for separable-denominator 2D IIR filters using a stability criterion based on the system matrixToma Miyata, Naoyuki Aikawa, Yasunori Sugita, Toshinori Yoshikawa. 826-829 [doi]
• A recursive least square algorithm for active noise control based on the Gauss-Seidel methodFelix Albu, Constantin Paleologu. 830-833 [doi]
• Synthesis of bandpass circulator-tree wave digital filtersLars Wanhammar, Baharak Soltanian, Oscar Gustafsson, Kenny Johansson. 834-837 [doi]
• Design of two-channel IIR filterbanks with rational sampling factorsKhaled Zbaida, Robert Bregovic, Tapio Saramäki. 838-841 [doi]
• Efficient parallel processing algorithm for fast calculation of 3D filtering using the VR FHTMohamed Aziz. 842-845 [doi]
• Ultra low voltage and, nor and XOR CMOS gatesYngvar Berg, Omid Mirmotahari, Snorre Aunet. 846-849 [doi]
• Mixed-voltage I/O buffer using 0.35 μm CMOS technologyTzung-Je Lee, Wei-Chih Chang, Chua-Chin Wang. 850-853 [doi]
• An anti-aliasing filter inspired by continuous-time ΔΣ modulationPavel Peev, Bart De Vuyst, Pieter Rombouts, Anas A. Hamoui. 854-857 [doi]
• Digital gain balancing technique for sensitive detection of minor gas concentrationsSandip Pal, Paul Wright, Hugh McCann. 858-861 [doi]
• Redundant signed digit coding in binary weighted DACsBenoit Catteau, Pieter Rombouts, Ludo Weyten. 862-865 [doi]
• Characterization of a temporal contrast microbolometer infrared sensorRainer Wohlgenannt, Daniel Matolin, Thomas Maier, Christoph Posch. 866-869 [doi]
• Design of a digital pixel image sensor array with adaptive quantization and pseudo Huffman codingMilin Zhang, Amine Bermak. 870-873 [doi]
• A model for the DC characteristics of a laser diodeMassimo Vanzi. 874-877 [doi]
• Coherence modulation of light for mathematical operationsSonia Elwardi, Mourad Zghal, Badr-Eddine Benkelfat. 878-881 [doi]
• Magnetic microsystem with extended dynamic range and absolute accuracyAleksander Sesek, Janez Trontelj. 882-885 [doi]
• High-precision timestamping and ultra high-speed arbitration of transient pixels' eventsAhmed Nabil Belbachir, Michael Hofstätter, Karl Reisinger, Martin Litzenberger, Peter Schön. 886-889 [doi]
• Providing granted rights with anonymous certificatesMichael Maaser, Steffen Ortmann. 890-893 [doi]
• Implementation of an ICMP-based covert channel for file and message transferZouheir Trabelsi, Wassim El-Hajj, Safuat Hamdy. 894-897 [doi]
• Identifying malicious peers in MANETsIbrahim Kamel, Hamdi Yahyaoui. 898-901 [doi]
• On protecting the integrity of sensor dataHussam Juma, Ibrahim Kamel, Lami Kaya. 902-905 [doi]
• Efficiency and pseudo-randomness of a variant of Zémor-Tillich hash functionChristophe Petit, Nicolas Veyrat-Charvillon, Jean-Jacques Quisquater. 906-909 [doi]
• Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approachesSukumar Jairam, Kusum Lata, Subir K. Roy, Navakanta Bhat. 910-913 [doi]
• Temperature control of a double-coil drive type IH cooker by means of the PDM control provided with audio noise suppressionHironobu Yonemori, Miki Kobayashi, Kogakuin Suzuki. 914-917 [doi]
• Accurate models for Frequency SynthesizersVictor Rodolfo Gonzalez-Diaz, Miguel Angel Garcia-Andrade, Flores-Verdad Guillermo Espinosa. 918-921 [doi]
• Fault detection and protection system for the power converters with high-voltage IGBTsDmitri Vinnikov, Indrek Roasto, Tonu Lehtla. 922-925 [doi]
• PFM mode buck converter: A mathematical model to calculate the maximum switching frequencyAndrea Morra, Marco Piselli, Alberto Gola. 926-929 [doi]
• Analytical probability of error in TH-PPM and TH-PAM ultra wideband systemsMoez Hizem, Ridha Bouallegue. 930-933 [doi]
• Monolithic buck converter for CMOS process technologiesTihomir Brusev, Marin Hristov. 934-937 [doi]
• Analysis of the critical rise time in MOBILE-based circuitsJosé M. Quintana, Maria J. Avedillo. 938-941 [doi]
• UWB microwave chaotic oscillators based on microchip amplifiersAndrey I. Panas, Elena Efremova, Boris Ye. Kyarginsky, Artyom Nickishov. 942-945 [doi]
• High frequency characterization of multilayered anisotropic planar circuits with several metallized interfacesChafik Boularak, Abdelhamid Khodja, Rachida Touhami, Mustapha C. E. Yagoub. 946-949 [doi]
• Optimal design of input filters for dc-dc switching regulator using ceramic and electrolytic capacitorsAntonietta De Nardo, Nicola Femia, Giovanni Petrone, Giovanni Spagnuolo. 950-953 [doi]
• A new type of level-shifter for n-type high side switches used in high-voltage switching ADSL line-driversJordie Buyle, Vincent De Gezelle, Benoit Bakeroot, Jan Doutreloigne. 954-957 [doi]
• An Energy-Efficient On-Demand Routing algorithm for Mobile Ad-Hoc NetworksSanjay Kumar Dhurandher, Sudip Misra, Mohammad S. Obaidat, Vikrant Bansal, Prithvi Raj Singh, Vikas Punia. 958-961 [doi]
• A new PWM/PFM control technique for improving efficiency over wide load rangeChi-Lin Chen, Wei-Lun Hsieh, Wei-Jen Lai, Ke-Horng Chen, Ching-Sung Wang. 962-965 [doi]
• The effect of filter type on BER of WCDMA-UMTS mobile radio systemsCornelis Jan Kikkert. 966-969 [doi]
• A distributed regulated power conversion topology to avoid thermal talk with core loadsSajal Kumar Mandal. 970-973 [doi]
• Wideband asymmetrical bandpass LC-ladder matching networks for low-noise amplifiersAntônio Carlos M. de Queiroz. 974-977 [doi]
• On the output events in concurrent error detection schemesMaí C. R. de Vasconcelos, Denis Teixeira Franco, Lirida A. B. Naviner, Jean-François Naviner. 978-981 [doi]
• A DBOASTBC-OFDM system for wireless communicationsShingo Otsu, Tatsuki Fukuda, Yuta Tokunaga, Hua-An Zhao, Chen Liu. 982-985 [doi]
• Design of a brushless micro motor driver for a locomotive endoscopic capsuleOscar Alonso, Lluis Freixas, Josep Samitier, Ángel Diéguez, Ekawahyu Susilo. 986-989 [doi]
• A quantum dot model for single photon sourceMoez Attia, Rihab Chatta. 990-993 [doi]
• Implementation of FlexRay communication controller protocol with application to a robot systemYi-Nan Xu, Yong-Eun Kim, Kyung-Ju Cho, Jin-Gyun Chung, Myoung-Seob Lim. 994-997 [doi]
• A PVT Tolerant sub-mA PLL in 65nm CMOS processYi Yang, Liqiong Yang, Zhuo Gao. 998-1001 [doi]
• SEPIC converter passive components designAntonietta De Nardo, Nicola Femia, Felice Forrisi, Maurizio Granato. 1002-1005 [doi]
• High speed CDR using a novel binary phase detector with probable-lock-detectionHung Tien Bui. 1006-1009 [doi]
• Gas identification system based on temperature modulation tin-oxide sensors and bio-inspired processingAïcha Far, Farid Flitti, Bin Guo, Amine Bermak. 1010-1013 [doi]
• Effects of the previous pulse shift and filter on the symbol synchronizer PLLAntonio D. Reis, José F. Rocha, Atílio Gameiro, José P. Carvalho. 1014-1017 [doi]
• A ROM-less direct digital frequency synthesizer based on 16-segment parabolic polynomial interpolationJian-Ming Huang, Chia-Chuan Lee, Chua-Chin Wang. 1018-1021 [doi]
• Support Vector Machine for diagnosis of the bars of cage inductance motorJaroslaw Kurek, Stanislaw Osowski. 1022-1025 [doi]
• Single input multiple output universal biquad using current mirrorsCostas Laoudias, Costas Psychalinos. 1026-1029 [doi]
• Cascade of Current-Starved Pseudo Floating-Gate invertersMehdi Azadmehr, Yngvar Berg. 1030-1033 [doi]
• A reconfigurable translinear cell architecture for CMOS field-programmable analog arraysDaniel Fernández, Jordi Madrenas, Piotr Michalik, Dominik Kapusta. 1034-1037 [doi]
• Clocked semi-floating-gate ultra low-voltage current mirrorYngvar Berg, Omid Mirmotahari, Snorre Aunet. 1038-1041 [doi]
• Field programmable analog array based on CMOS CFOA and its applicationAhmed H. Madian, Soliman A. Mahmoud, Ahmed M. Soliman. 1042-1046 [doi]
• Design on mixed-voltage I/O buffers with slew-rate control in low-voltage CMOS processMing-Dou Ker, Tzu-Ming Wang, Fang-Ling Hu. 1047-1050 [doi]
• Crosstalk-avoidance coding for low-power on-chip busKuang-Chin Cheng, Jing-Yang Jou. 1051-1054 [doi]
• Impacts of signal slew and skew variations on delay uncertainty and crosstalk noise in coupled RLC global interconnectsAbinash Roy, Jingye Xu, Masud H. Chowdhury. 1055-1058 [doi]
• Digital signal propagation on a wafer-scale smart active programmable interconnectOlivier Valorge, Anh Tuan Nguyen, Yves Blaquière, Richard Norman, Yvon Savaria. 1059-1062 [doi]
• Delay insensitivity verification of bit-level pipelined systolic arrays in dual-rail treshold logicAyse Neslin Ismailoglu, Murat Askar. 1063-1066 [doi]
• Techniques to reduce folding of noise and interferers in PLL charge-pumpFredrik Jonsson, Håkan Olsson. 1067-1070 [doi]
• 79GHz Push-Push oscillators in 0.13μm SiGe BiCMOS technologyChama Ameziane, Thierry Taris, Robert Plana, Franck Badets, Yann Deval, Jean-Baptiste Begueret. 1071-1074 [doi]
• A comparison of polar transmitter architectures using a GaN HEMT power amplifierEllie Cijvat, Henrik Sjöland, Kevin Tom, Mike Faulkner. 1075-1078 [doi]
• The transformer-less generation of amplitude modulation: Theory and experimentBuddhi Kanmani. 1079-1082 [doi]
• Losses analysis and performance improvement of a rectenna for RFID systemsAlexandre Douyere, Frédéric Alicalapa, Jean-Daniel Lan Sun Luk, Alain Celeste. 1083-1086 [doi]
• Combined application of interleaving and modulation techniques in multiconverter topologyJuan Mon, David González, Javier Gago, Josep Balcells. 1087-1090 [doi]
• Positive-sequence grid voltage detector for distributed generation systems with no tuning requirementsEider Robles, Josep Pou, Salvador Ceballos, Jordi Zaragoza, Igor Gabiola, José Luis Martín. 1091-1094 [doi]
• Tracking method for the hybrid modulation to minimize neutral-point voltage oscillations in the three-level converterJordi Zaragoza, Josep Pou, Salvador Ceballos, Antoni Arias, Pedro Ibañez. 1095-1098 [doi]
• Overview of maximum power point tracking control techniques used in photovoltaic systemsCarles Jaen, Cristian Moyano, Xavier Santacruz, Josep Pou, Antoni Arias. 1099-1102 [doi]
• Three phase four wires shunt hybrid filterManuel Lamich, Josep Balcells, David González, Javier Gago. 1103-1106 [doi]
• Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aidsJosé Rui Custódio, Nuno F. Paulino, João Goes, Erik Bruun. 1107-1110 [doi]
• Resolution enhancement of sigma-delta modulators using a tracking digital filterLuis Hernandez, Susanna Patón. 1111-1114 [doi]
• Digitally-enhanced high-order ΔΣ modulatorsAnas A. Hamoui, Mohammad Sukhon, Franco Maloberti. 1115-1118 [doi]
• Band-pass continuous-time delta-sigma modulators employing LWR resonatorsMohammad Javidan, Philippe Bénabès. 1119-1122 [doi]
• A one-path quadrature bandpass ΣΔ modulator based on distributed resonators at 25 MHz IFEnrique Prefasi, Stijn Reekmans, Luis Hernández. 1123-1126 [doi]
• Design guidelines for minimum harmonic distortion in a wien oscillator with automatic amplitude control systemGaetano Palumbo, Melita Pennisi, Salvatore Pennisi. 1127-1130 [doi]
• Harmonic analysis of RC-active phase shift oscillatorsJohn Taylor. 1131-1134 [doi]
• A dual mode EPC Gen 2 UHF RFID transponder in 0.18μm CMOSVali Najafi, Mahta Jenabi, Siamak Mohammadi, Ali Fotowat Ahmady, Mohammadreza Binesh Marvasti. 1135-1138 [doi]
• Design methodology for a divide-by-4 LC injection-locked frequency divider based on nonlinear analysisSaeid Daneshgar, Michael Peter Kennedy. 1139-1142 [doi]
• Analysis of Bang-bang CDR circuits with equations of linear motionArchit Joshi. 1143-1146 [doi]
• An ALU cluster Intellectual Property Dedicated for media streaming architecture with homogeneous processor coresChia-Yi Liou, Chen-Chi Kuo, Herming Chiueh. 1147-1150 [doi]
• A low power high performance design for JPEG Huffman decoderKun-Lin Tsai, Paul Lan, Shanq-Jang Ruan, Mon-Chau Shie. 1151-1154 [doi]
• A high-speed and high-accuracy interpolator for digital modemsNicola Petra, Alan N. Willson. 1155-1158 [doi]
• Hardware/software system co-verification of an active reconfigurable board with SystemC-VHDLYan Basile-Bellavance, Etienne Lepercq, Yves Blaquière, Yvon Savaria. 1159-1162 [doi]
• Yield model characterization for analog integrated circuit using Pareto-optimal surfaceSawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew D. Brown. 1163-1166 [doi]
• Sub-threshold signal detection using noise statistics for communications applicationsHyunju Ham, Toshimasa Matsuoka, Kenji Taniguchi 0001. 1167-1170 [doi]
• Design of transient second-order IIR filters with optimum dynamic frequency responsesJeedella S. Jeedella, Hussain Al-Ahmad, Mohammed E. Al-Mualla, Jim M. Noras. 1171-1174 [doi]
• Finite alphabet generator with parameterized Markov chain transition matrixMariem Kallel Smaoui, Yousra Ben Jemaa, Meriem Jaïdane. 1175-1178 [doi]
• An H.264/AVC MP@L4.1 quarter-pel motion estimation processor VLSI for real-time MBAFF encodingKosuke Mizuno, Junichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto. 1179-1182 [doi]
• Soft DT-CNN core implementationSuleyman Malki, Lambert Spaanenburg. 1183-1186 [doi]
• Construction of the cyclic block-type LDPC codes for low complexity hardware implementationKuang-Hao Lin, Robert C. Chang, Alex Chien-Lin Huang, Sheng-Dong Wu. 1187-1190 [doi]
• A novel approach to grid sensor networksDuminda A. Dewasurendra, Peter H. Bauer. 1191-1194 [doi]
• Performance evaluation of compensation/reward mechanism for resource allocation in wireless networksJamila Bhar, Ridha Ouni, Salem Nasri. 1195-1200 [doi]
• A fault diagnosis mechanism for a proactive maintenance scheme for wireless systemsBarbara Walsh, Ronan Farrell. 1201-1204 [doi]
• UWB direct chaotic transceiver for wireless sensor networksAlexander S. Dmitriev, Anton Laktushkin, Yury Andereyev, Andrey V. Kletsov, Lev V. Kuzmin, Vladimir Sinyakin. 1205-1208 [doi]
• A frequency based digital background calibration technique for pipelined ADCsArmin Jalili, Sayed Masoud Sayedi, Rasoul Dehghani, Ebrahim Farshidi. 1209-1212 [doi]
• A flexible algorithmic ADC for wireless sensor nodesI. E. Martin, Ana Rusu, Mohammed Ismail, Harald Neubauer, Johann Hauer. 1213-1216 [doi]
• An A/D converter based on pulse width modulation and the walsh-hadamard transformLuis Hernández, Susanna Patón, Enrique Prefasi. 1217-1220 [doi]
• The impact of dielectric relaxation on ΣΔ-modulatorsJeroen De Maeyer. 1221-1224 [doi]
• Efficient testing of Σ-Δ A/D convertersDrago Strle. 1225-1228 [doi]
• On-chip supply current monitoring units using magnetic force sensingMartin Donoval, Martin Daricek, Viera Stopjaková, Juraj Marek. 1229-1232 [doi]
• Characterization of MagFET structuresMartin Daricek, Martin Donoval, Alexander Satka, Tomas Kosik. 1233-1236 [doi]
• The nonlinear-by-singularity systemsEmanuel Gluskin. 1237-1240 [doi]
• Modeling of EMI propagation in switched-capacitor ΣΔ A/D converterDavid Cristaldi, Gianluca Giustolisi. 1241-1244 [doi]
• High resolution analog-to-digital converter for low-frequency high-voltage signalsLasse Aaltonen, Kari Halonen. 1245-1248 [doi]
• Track and hold circuit design and implementation in 65 nm CMOS technology for RF subsampling receiversRamzi Darraji, Rim Barrak, Chiheb Rebai, Adel Ghazel, Yann Deval, Fadhel M. Ghannouchi. 1249-1252 [doi]
• Analog post amplifier effect on signal sampling and monitoring systemsChedly Belhadj-Yahya. 1253-1256 [doi]
• SiGe BiCMOS X-Band integrated radiometerFabio Ducati, Andrea Mazzanti, Mattia Borgarino, Marco Pifferi. 1257-1260 [doi]
• Adaptability in wireless sensor networksAlessio Vecchio. 1261-1264 [doi]
• System-on-chip microwave radiometer for thermal remote sensing and its application to the forest fire detectionFederico Alimenti, Domenico Zito, Andrea Boni, Mattia Borgarino, Alessandro Fonte, Alessandro Carboni, Salvatore Leone, Marco Pifferi, Luca Roselli, Bruno Neri, Roberto Menozzi. 1265-1268 [doi]
• A 13GHz VCO for integrated radiometerAndrea Boni, Alessandro Carboni, Alessio Facen. 1269-1272 [doi]
• CMOS microwave radiometer: Experiments on down-conversion and direct detectionsAlessandro Fonte, Domenico Zito, Federico Alimenti. 1273-1276 [doi]
• Study and development of an efficient RC-in-RC-out MOR methodPekka Miettinen, Mikko Honkala, Janne Roos, Carsten Neff, Achim Basermann. 1277-1280 [doi]
• AER and dynamic systems co-simulation over Simulink with Xilinx System GeneratorAngel Jiménez-Fernandez, Alejandro Linares-Barranco, Rafael Paz-Vicente, Carlos Daniel Luján-Martinez, Gabriel Jiménez, Antón Civit. 1281-1284 [doi]
• Asynchronous Linear Pipelines: An efficient-optimal pipelining algorithmEslam Yahya, Marc Renaudin. 1285-1289 [doi]
• Reseeding using compaction of pre-generated LFSR sub-sequencesArtur Jutman, Igor Aleksejev, Jaan Raik, Raimund Ubar. 1290-1295 [doi]
• Variance reduction techniques for Monte Carlo simulations. A parameterizable FPGA approachPedro Echeverría, Marisa López-Vallejo, Jose María Pesquero. 1296-1299 [doi]
• Implementation of large-integer hardware multiplier in Xilinx FPGAJacques Laurent Athow, Asim Jawad Al-Khalili. 1300-1303 [doi]
• A full-adder based reconfigurable architecture for fine grain applications: ADAPTOGian-Carlo Cardarilli, Luca Di Nunzio, Marco Re. 1304-1307 [doi]
• On the higher efficiency of parallel Reed-Solomon turbo-decodingCamille Leroux, Christophe Jégo, Patrick Adde, Michel Jézéquel. 1308-1311 [doi]
• High dynamic range imaging on mobile devicesRadu Ciprian Bilcu, Adrian Burian, Aleksi Knuutila, Markku Vehvilainen. 1312-1315 [doi]
• FPGA design for user's presence detectionVasily G. Moshnyaga, Koji Hashimoto, Tadashi Suetsugu. 1316-1319 [doi]