Table of Contents

• A Probabilistic Pipeline Algorithm for K-Selection on the Tree MachineAlbert G. Greenberg, Udi Manber. 1-5
• The Traveling Salesman Problem on a Hypercubic, MIMD ComputerEdward W. Felten, Steve W. Otto, Scott Karlin. 6-10
• Subset Selection in ParallelLarry Rudolph, William L. Steiger. 11-13
• Parallel Algorithms for Shortest Path ProblemsRichard C. Paige, Clyde P. Kruskal. 14-20
• Performance of the Butterfly Processor-Memory Interconnection in a Vector EnvironmentEugene D. Brooks III. 21-24
• Iterative Solution of Large, Sparse, Linear Systems on a Static Data Flow Architecture: Performance StudiesDaniel A. Reed, Merrell L. Patrick. 25-32
• On the Effective Bandwidth of Interleaved Memories in Vector Processor SystemsWilfried Oed, Otto Lange. 33-40
• Interconnection Networks And Parallel Memory Organizations For Array ProcessingAbhiram G. Ranade. 41-47
• A Systems Approach to Mapping a Karhunen-Loeve Transform into a Systolic ArrayH. Barad, Dan I. Moldovan. 48-55
• Mapping Production Systems into MultiprocessorsManoel Fernando Tenorio, Dan I. Moldovan. 56-62
• Design Trade-offs for Process Scheduling in Tightly Coupled Multiprocessor SystemsLionel M. Ni, Ching-Farn Eric Wu. 63-70
• The Mark III Hypercube-Ensemble Concurrent ComputerJohn C. Peterson, Jesus O. Tuazon, Don Lieberman, Moshe Pniel. 71-73
• On the Power of the Augmented Data Manipulator NetworkMary Diane Palmer Leland. 74-78
• BCA : A Bus Connected ArchitectureRenben Shu, Peter C. Patton. 79-88
• Multi-Grid oriented Computer ArchitectureArndt Bode, Gerhard Fritsch, Wolfgang Händler, Wolfgang Henning, Fridolin Hofmann, Jens Volkert. 89-95
• Design and Implementation of a VLSI Systolic Array for Solving Nonlinear Partial Differential EquationsMark A. Shell, Donald W. Bouldin, Paul D. Manhardt. 96-98
• Memory and Modularity in Systolic Array ImplementationsAllan L. Fisher. 99-101
• Remps: A Reconfigurable Multiprocessor for Scientific SupercomputingKai Hwang, Zhiwei Xu. 102-111
• Polymorphic Arrays: An Architecture for a Programmable Systolic MachineAmos Fiat, Adi Shamir, Ehud Y. Shapiro. 112-117
• Fast Multiway Merge Using Destructive OperationEhud Y. Shapiro, Shmuel Safra. 118-122
• MANIP-2 : A Multicomputer Architecture for Evaluating Logic ProgramsGuo-Jie Li, Benjamin W. Wah. 123-130
• A Comparative Study of Unification Algorithms For Or-Parallel Execution of Logic LanguagesJim A. Crammond. 131-138
• Making Oneself Known in a Distributed WorldAhmed K. Ezzat, Rakesh Agrawal. 139-142
• Concurrent Mulitgrid Methods in an Object-Oriented Environment: A Case StudyHeinz Mühlenbein, S. Warhaut. 143-146
• Evaluation Criteria for Communication Structures in Parallel ArchitecturesSteven P. Levitan. 147-154
• Maintaining Weakly-Consistent Replicated Data on Dynamic Groups of ComputersAriel J. Frank, Larry D. Wittie, Arthur J. Bernstein. 155-162
• A Partitioning Strategy for PDEs Across MultiprocessorsMarsha J. Berger, Shahid H. Bokhari. 166-170
• Simulation of a Word Recognition System on Two Parallel ArcitecturesMark A. Yoder, Leah H. Jamieson. 171-179
• The Power of Parallel PrefixClyde P. Kruskal, Larry Rudolph, Marc Snir. 180-185
• Parallel Updates of Graph Properties in Logarithmic TimeShaunak Pawagi, I. V. Ramakrishnan. 186-193
• Performance of Parallel Branch-and-Bound AlgorithmsTen-Hwang Lai, Alan P. Sprague. 194-201
• An Embedded Software Design Simulator for ADA MultitaskingDavid Lefkovitz, Roger Y. Lee, Philip R. Nelson. 202-209
• Dictionary Machines on Cube-Class NetworksAlan M. Schwartz, Michael C. Loui. 210-216
• Analysis of Firing Rates in Petri Nets Using Linear AlgebraBruce P. Lester. 217-224
• Extensions to the C Programming Language for SIMD/MIMD ParallelismJames T. Kuehn, Howard Jay Siegel. 232-235
• Expressing and Exploiting Parallelism on an Experimental MIMD SystemChristian Fraboul, Nourredine Hifdi. 236-238
• Open Predicate Path Expressions and their Implementation in Highly Parallel Computing EnvironmentsMark R. Headington, Arthur E. Oldehoeft. 239-246
• Structured Process: A New Language Attribute for Better Interaction of Parallel Architecture and AlgorithmHungwen Li, Ching-Chy Wang, Mark A. Lavin. 247-254
• Parallel Programming in LindaDavid Gelernter, Nicholas Carriero, Sarat Chandran, Silva Chang. 255-263
• Globally Optimum Selection of Memory Storage PatternsMary E. Mace, Robert A. Wagner. 264-271
• XOR-Schemes: A Flexible Data Organization in Parallel MemoriesJean Marc Frailong, William Jalby, Jacques Lenfant. 276-283
• A Modified Conjugate Gradient Solver for Very Large SystemsDavid Barkai, K. J. M. Moriarty, Claudio Rebbi. 284-290
• Superlinear Speedup Through Randomized AlgorithmsRavi Mehrotra, Edward F. Gehringer. 291-300
• Shift Arithmetic on a Token Ring NetworkMiron Livny, Udi Manber. 301-304
• A New Parallel Algorithm for Solving a Complex Function F(Z)=0Carlos Cardelino, Pin-Yee Chen. 305-311
• Parallel Implementation of the LMS AlgorithmJack S. Walicki, M. Andrews. 312-316
• A Load-Sharing Banyan NetworkChin-Tau A. Lea. 317-324
• Realization of Permutations on Generalized Indra NetworksAnujan Varma, C. S. Raghavendra. 328-333
• An O(log:::2:::N) Control AlgorithmTse-Yun Feng, Wei Young. 334-340
• An Architecture for a Dataflow MultiprocessorYang-Chang Hong, Thomas H. Payne, Le Baron O. Ferguson. 349-355
• On Testing Permutation Network IsomorphismsA. Yavuz Oruç, M. Yaman Oruç. 361-368
• Parallel Garbage Collection with Associative TagHeonshik Shin, Miroslaw Malek. 369-375
• An Optimal Family of Matrix Multiplication Algorithms on Linear ArraysI. V. Ramakrishnan, Peter J. Varman. 376-383
• Self-Clocking NetworksA. J. Field, M. D. Cripps. 384-387
• Optical Interconnection NetworksAlexander A. Sawchuk, Bob K. Jenkins, C. S. Raghavendra, Anujan Varma. 388-392
• Fat-Trees: Universal Networks for Hardware-Efficient SupercomputingCharles E. Leiserson. 393-402
• Fault Location in Distributed Control Interconnection NetworksNathaniel J. Davis IV, William Tsun-Yuk Hsu, Howard Jay Siegel. 403-410
• Efficient Parallel Solutions to Geometric ProblemsMikhail J. Atallah, Michael T. Goodrich. 411-417
• A Mesh Automaton for Solving Dense Linear SystemsPeter R. Cappello. 418-425
• Parallelized ADI Scheme Using GECR (Gauss-Elimination-Cyclic-Reduction) Method and Implementation of Navier-Stokes Equation in the PAX computerTsutomu Hoshino, Takeshi Kamimura, Toshihiro Iida, Tomonori Shirakawa. 426-433
• Systolic Processing for Dynamic Programming ProblemsGuo-Jie Li, Benjamin W. Wah. 434-441
• Refined C: A Sequential Language for Parallel ProgrammingHenry G. Dietz, David Klappholz. 442-449
• Useful Parallelism in a Multiprocessing EnvironmentRon Cytron. 450-457
• The Performance of a Fault-Tolerant Multistage Interconnection NetworkNian-Feng Tzeng, Pen-Chung Yew, Chuan-Qi Zhu. 458-465
• Performance Analysis of a Redundant-Path Interconnection NetworkAnujan Varma, C. S. Raghavendra. 474-479
• Evaluating the Cost-Effectiveness of Switches in Processor Array ArchitecturesHaim E. Mizrahi, Israel Koren. 480-487
• KYKLOS : A Linear Growth Fault-Tolerant Interconnection NetworkBernard L. Menezes, Roy M. Jenevein. 498-502
• : Distributed Discrete Event Simulation using DataflowV. Ashok, Neelam Soundararajan, Roger L. Costello. 503-510
• Static Allocation for a Data Flow MultiprocessorMichael L. Campbell. 511-517
• A Semi-Markov Model for the Performance of Multiple-Bus SystemsTrevor N. Mudge, Humoud B. Al-Sadoun. 521-530
• Performance Measurements on a 128-Node Butterfly Parallel ProcessorWilliam R. Crowther, J. Goodhue, E. Starr, Robert H. Thomas, W. Milliken, T. Blackadar. 531-540
• Speedup Predictions on Large Scientific Parallel Programs on Cray X MP Like ArchitecturesElizabeth Williams, Frank Bobrowicz. 541-543
• Quadtrees in Concurrent PROLOGShimon Edelman, Ehud Y. Shapiro. 544-551
• B-Log: A Branch and Bound Methodology for the Parallel Execution of Logic ProgramsG. Jack Lipovski, Manuel V. Hermenegildo. 560-567
• Towards the Parallel Execution of Rules in Production System ProgramsToru Ishida, Salvatore J. Stolfo. 568-575
• MAN-YO : A Special Purpose Parallel Machine for Logic Design AutomationNobuhiko Koike, Kenji Ohmori. 583-590
• Reliability Simulation of Multiprocessor SystemsChita R. Das, Laxmi N. Bhuyan. 591-598
• Parallel Signal Processing Research on the HEPMartin T. Hagan, Howard B. Demuth, Paul Hartono Singgih. 599-606
• The Effectiveness of Automatic Restructuring on Nonnumerical ProgramsGyungho Lee, Clyde P. Kruskal, David J. Kuck. 607-613
• Uniform Parallelism Exploitation in Ordinary ProgramsAlexandru Nicolau. 614-618
• A Graph-Based Computation Model for Real-Time SystemsAloysius K. Mok. 619-623
• Formulation and Programming of Parallel Computations: A Unified ApproachJames C. Browne. 624-631
• Synthesizing Distributed and Parallel Programs through Optimistic TransformationsRobert E. Strom, Shaula Yemini. 632-642
• The TAMIPS MultiprocessorJouko O. Viitanen, Pertti Vanni. 643-645
• A Cache-Based Multiprocessor with High EfficiencyMichel Dubois. 646-648
• A Reconfigurable MultiprocessorLee D. Coraor, Paul T. Hulina. 649-651
• Dirmu Multiprocessor ConfigurationsWolfgang Händler, Erik Maehle, Klaus Wirl. 652-656
• A VLSI-Based Multiprocessor Architecture for Implementing Parallel AlgorithmsPing-Sheng Tseng, Kai Hwang, Viktor K. Prasanna. 657-664
• Characterization of Parallel ArchitectureJames C. Browne. 665
• Caltech/JPL MARK II Hypercube Concurrent ProcessorJesus O. Tuazon, John C. Peterson, Moshe Pniel, Don Lieberman. 666-673
• Design and Implementation of Switching Systems for Parallel ProcessorsRan Ginosar, Dwight D. Hill. 674-680
• Pyramids, Crossbars and Thousands of ProcessorsCreve Maples. 681-688
• A Reconfigurable Architecture for Digital Time Domain BeamformingWilliam Robertson, D. Pincock, D. N. Swingler. 689-696
• Varying Diameter and Problem Size in Mesh-Connected ComputersRuss Miller, Quentin F. Stout. 697-699
• Computing Tree Functions on Mesh-Connected ComputersP. S. Gopalakrishnan, I. V. Ramakrishnan, Laveen N. Kanal. 703-710
• An Efficient Connected Components Algorithm on a Mesh-Connected ComputerP. S. Gopalakrishnan, I. V. Ramakrishnan, Laveen N. Kanal. 711-714
• Performing Tree and Prefix Computations on Modified Mesh-Connected Parallel ComputersDavid A. Carlson. 715-718
• Tradeoffs in Mapping Algorithms to Array ProcessorsTsair-chin Lin, Dan I. Moldovan. 719-726
• Tree-Based Graph Algorithms for Some Parallel ComputersQuentin F. Stout. 727-730
• Prep-P: A Mapping Preprocessor for CHiP ArchitecturesFrancine Berman, Michael A. Goodrich, Charles Koelbel, W. J. Robison III, Karen Showell. 731-733
• Design of Configuration Algorithms of Commonly-Used Topologies for a Multiprocessor : STARWoei Lin, Chuan-lin Wu. 734-741
• A Programmable Systolic Array for Arithmetic Operations in Galois FieldsDavid Y. Y. Yun, Chang-Nian Zhang. 742-747
• Translation of Systolic Algorithms between Systems of Different TopologyKarel Culik II, Sheng Yu. 756-763
• The IBM Research Parallel Processor Prototype (RP3): Introduction and ArchitectureGregory F. Pfister, William C. Brantley, David A. George, Steve L. Harvey, Wally J. Kleinfelder, Kevin P. McAuliffe, Evelin S. Melton, V. Alan Norton, Jodi Weiss. 764-771
• A Methodology for Predicting Multiprocessor PerformanceV. Alan Norton, Gregory F. Pfister. 772-781
• RP3 Processor-Memory ElementWilliam C. Brantley, Kevin P. McAuliffe, Jodi Weiss. 782-789
• Hot Spot Contention and Combining in Multistage Interconnection NetworksGregory F. Pfister, V. Alan Norton. 790-797
• Fault Reconfiguration in a Distributed MIMD Environment with a Multiusage NetworkM. Ümit Uyar, Anthony P. Reeves. 798-806
• Computation Availability of Multiple-Bus MultiprocessorsChita R. Das, Laxmi N. Bhuyan. 807-813
• RAFT: A Recursive Algorithm for Fault TolerancePrathima Agrawal. 814-821
• Exception Handling in MultilispRobert H. Halstead Jr., Juan R. Loaiza. 822-830
• Efficient Distributed Evaluation of Functional Programs Using Serial CombinatorsPaul Hudak, Benjamin Goldberg. 831-839
• Lazy Evaluation and Cancellation of ComputationsDavid Hemmendinger. 840-842
• New Parallel Algorithms for Solving First-Order and Certain Classes of Second-Order Linear RecurrencesS. Lakshmivarahan, Sudarshan K. Dhall. 843-845
• Sorting and Selection in Multi-Channel Broadcast NetworksJohn M. Marberg, Eli Gafni. 846-850
• A Family of Parallel Sorting AlgorithmsYijie Han. 851-853
• Parallel Sorting on the B-HIVE MachineDharma P. Agrawal, P. Ja-SongLeu, Cai TaoNie. 862-864
• Sorting with Systolic ArchitecturePin-Yee Chen, Miguel Nussbaum. 865-868