Table of Contents

• An Automorphism of a Class of Interconnection NetworksWoei Lin. 1-3
• Effect of Arbitration Policies on the Performance of Interconnection NetworksLaxmi N. Bhuyan. 4-7
• Equivalence Between Cube-Connected Cycles Networks and Circular Shuffle NetworksBijendra N. Jain, Satish K. Tripathi. 8-11
• Rearrangeability of the 5-Stage Shuffle/Exchange Network for N=8 9Anujan Varma, C. S. Raghavendra. 11-122
• The Distribution of Waiting Times in Clocked Multistage Interconnection NetworksClyde P. Kruskal, Marc Snir, Alan Weiss. 12-19
• The Sneptree : A Versatile Interconnection NetworkPeyyun Peggy Li, Alain J. Martin. 20-27
• The Onset of Hot-Spot ContentionGregory F. Pfister, Manoj Kumar. 28-34
• The Effectiveness of Combining in Shared Memory Parallel Computer in the Presence of Hot Spots Gyungho Lee, Clyde P. Kruskal, David J. Kuck. 35-41
• Shared Memory Emulation Algorithm for MultiprocessorsKyoji Yuyama, Zary Segall. 42-45
• Behavior of the Butterfly Parallel Processor in the Presence of Memory Hot SpotsRobert H. Thomas. 46-50
• Distributing Hot-Spot Addressing in Large Scale MultiprocessorPen-Chung Yew, Nian-Feng Tzeng, Duncan H. Lawrie. 51-58
• Simultaneous Iterations Algorithm for General Eigenvalue Problems on Parallel ProcessorsSenol Utku, Y. Chang, Moktar Salama, D. Rapp. 59-66
• A Pipelined Solution Method of Tridiagonal Linear Equation SystemsGuang R. Gao. 84-91
• Parallel Decomposition of Matrix Inversion Using QuadtreesDavid S. Wise. 92-99
• SK-Banyans: A Unified Class of Banyan NetworksJulio de Melo, Roy M. Jenevein. 100-107
• Performance Studies of Multiple-Packet Multistage Cube Networks and Comparison to Circuit SwitchingNathaniel J. Davis IV, Howard Jay Siegel. 108-114
• Analysis of CC-Banyan NetworksVladimir Cherkassky, Miroslaw Malek. 115
• Control Algorithms for the Augmented Data Manipulator NetworkKyungsook Y. Lee, Daeshik Lee. 123-130
• Optimistic vs. Pessimistic Concurrency Control Algorithms: A Comparative StudyAhmed K. Elmagarmid, Abdelsalam Helal, Magdy H. Nagi. 131-138
• Parallel Structuring of Control and Resources Management Systems for Parallel ProgramsRobert O Dell, James C. Browne. 153-156
• Estimating the Speedup in Parallel ParsingDilip Sarkar, Narsingh Deo. 157-163
• PTOOL : A Semi-Automatic Parallel Programming AssistantRandy Allen, Donn Bäumgartner, Ken Kennedy, Allan Porterfield. 164-170
• Distributed Languages Design Constructs for Controlling PreferencesTzilla Elrad, Fred A. Maymir-Ducharme. 176-183
• Refined Fortran: Another Sequential Language for Parallel ProgrammingHenry G. Dietz, David Klappholz. 184-191
• Evaluation of Three Interconnection Networks for CMOS VLSI ImplementationPinaki Mazumder. 200-207
• On Designing Interconnection Networks for MultiprocessorsMark A. Franklin, Sanjay Dhar. 208-215
• : A Group Theoretic Model for Symmetric Interconnection NetworksSheldon B. Akers, Balakrishnan Krishnamurthy. 216-223
• Operating System Kernel for a Reconfigurable Multiprocessor SystemGeoffrey M. Brown, Chuan-lin Wu. 234-241
• The Interface Between Distributed Operating System and High-Level Programming LanguageMichael L. Scott. 242-249
• Programming Solutions to the Algorithm Contraction ProblemDavid Notkin, Lawrence Snyder. 258-261
• Parallel Algorithms for 2-D ConvolutionZhixi Fang, Lionel M. Ni. 262-269
• Parallel Geometric Algorithms for Digitized Pictures on Mesh of TreesViktor K. Prasanna, Mary Mehrnoosh Eshaghian. 270-273
• Parallel A^* and AO^* Algorithms: An Optimality Criterion and Performance EvaluationKeki B. Irani, Yifong Shih. 274-277
• Parallel Prefix on Fully Connected Direct Connection MachinesClyde P. Kruskal, Larry Rudolph, Tom Madej. 278-284
• Hierarchical Array Processor (HAP) Featuring High Reliability and High System PerformanceTsutomu Ishikawa, Shigeharu Momoi, Shigeo Shimada, Yoshio Ogawa. 293-300
• Mesh-Connected Computer Algorithms for Rectangle-Intersection ProblemsMi Lu, Peter J. Varman. 301-307
• M^2-Mesh: An Augmented Mesh ArchitectureTsair-chin Lin, Dan I. Moldovan. 308-315
• Synthesis of a Family of Cellular Permutation ArraysA. Yavuz Oruç. 324-326
• A Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add PrimitivePrithviraj Banerjee, Abhijeet Dugar. 327-334
• Analysis of a Kind of Fault-Tolerant Interconnection NetworkYuanyuan Yang, Lan Jin. 335-342
• Massively Fault-Tolerant Cellular ArraysMyoung Sung Lee, Gideon Frieder. 343-350
• A Fault-Tolerant VLSI Matrix MultiplierPeter J. Varman, I. V. Ramakrishnan. 351-357
• Fail Safe Distributed Fault Diagnosis of Multiprocessor SystemsChung-Yang Chiang, Chuan-lin Wu. 358-365
• The Impact of Hardware Gather/Scatter on Sparse Gaussian EliminationJohn G. Lewis, Horst D. Simon. 366-368
• Block-Oriented, Local-Memory Based Linear Equation Solution on the Cray-2 Uniprocessor AlgorithmsDonald A. Calahan. 375-378
• VLSI Time/Space Complexity of an Associative Parallel Join ModuleAli R. Hurson. 379-386
• A New VLSI System for Adaptive Recursive FilteringKam-Hoi Cheng, Sartaj Sahni. 387-389
• RECBAR : A Reconfigurable Massively Parallel Processing ArchitectureVijay Balasubramanian, Prithviraj Banerjee. 390-393
• Synthesis and Mapping Algorithms for a Reconfigurable Optical Interconnection NetworkInsup Lee, Samuel M. Goldwasser, David Smitley. 394-396
• Design of VLSI Asynchronous FIFO Queues for Packet Communication NetworksTam Anh Chu, Clement K. C. Leung. 397-400
• Optical Matrix-Vector Implementation of Crossbar Interconnection NetworksAlexander A. Sawchuk, Bob K. Jenkins, Anujan Varma, C. S. Raghavendra. 401-404
• Distributed Recovery in Applicative SystemsFrank C. H. Lin, Robert M. Keller. 405-412
• Fault Tolerant Scheme on Partial Differential EquationsGyo Osawa, Toshio Kawai, Hideo Aiso. 413-416
• The Traveling Salesman Problem: The Development of a Distributed ComputationNick Lai, Barton P. Miller. 417-420
• Optimized Demand-driven Evaluation of Functional Programs on a Dataflow MachineSatoshi Ono, Naohisa Takahashi, Makoto Amamiya. 421-428
• Optimizing Matrix Operations on a Parallel Multiprocessor with a Memory Hierarchical SystemWilliam Jalby, Ulrike Meier. 429-432
• Multiprocessor Jacobi Algorithms for Dense Symmetric Eigenvalue and Singular Value DecompositionsMichael Berry, Ahmed H. Sameh. 433-440
• Solving Positive Definite Linear Systems on Vector ComputersHung-chi Kuo, Swarn P. Kumar. 441-443
• Parallel Approximate Algorithms for the 0-1 Knapsack ProblemP. S. Gopalakrishnan, I. V. Ramakrishnan, Laveen N. Kanal. 444-451
• Parallel Processing for Quadtree ProblemsGee-gwo Mei, Wentai Liu. 452-454
• A Feasibility Study and Simulation of the Circulating Context Multiprocessor (CCMP)Clinton A. Staley, Steven E. Butner. 455-462
• Shared Memory Versus Message-Passing in a Tightly-Coupled Multiprocessor: A Case StudyThomas J. LeBlanc. 463-466
• A Communication Model for Optimizing Hierarchical Multiprocessor SystemsSantosh G. Abraham, Edward S. Davidson. 467-474
• CAMP: A Programming Aide for MultiprocessorsJih-Kwon Peir, Daniel Gajski. 475-482
• The Design of a Queue-Based Vector SupercomputerHonesty C. Young, James R. Goodman. 483-486
• Data Synchronized Pipeline Architecture: Pipelining in Multiprocessor EnvironmentsYvon Jégou, André Seznec. 487-494
• Multipipeline Networking for Fast Evaluation of Vector Compound FunctionsKai Hwang, Zhiwei Xu. 495-502
• A Parallel Vector Reduction ArchitectureHai Xiang Lin, Henk J. Sips. 503-510
• Shared Pipelines: Effective Pipelining in Multiprocessor SystemsJ. Dean Brock, Amos Omondi. 511-514
• Pipelined Register-Storage ArchitecturesSteven R. Kunkel, James E. Smith. 515-518
• Execution of Parallel Loops on Parallel Processor SystemsConstantine D. Polychronopoulos, David J. Kuck, David A. Padua. 519-527
• Processor Self-Scheduling for Multiple-Nested Parallel LoopsPeiyi Tang, Pen-Chung Yew. 528-535
• Advanced Loop InterchangingMichael Wolfe. 536-543
• Compiler Generated Synchronization for Do LoopsSamuel P. Midkiff, David A. Padua. 544-551
• Efficient Execution of Programs with Pipeline Configuration of Reconfigurable MultiprocessorKaram Mossaad, Chuan-lin Wu. 552-554
• Simultaneous Broadcasting in Multiprocessor NetworksGeorge Cybenko, David W. Krumme, K. N. Venkataraman. 555-558
• Vector Processing on the Alliant FX/8 MultiprocessorWalid A. Abu-Sufah, Allen D. Malony. 559-566
• Suprenum: The German Supercomputer Architecture Rationale and ConceptsWolfgang K. Giloi, Peter M. Behr. 567-575
• Dependability Evaluation of Multicomputer NetworksLaxmi N. Bhuyan, Chita R. Das. 576-583
• Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of ProcessorsKei Hiraki, Kenji Nishida, Satoshi Sekiguchi, Toshio Shimada. 584-591
• : Token Relabeling in a Tagged Data-Flow ArchitectureYi-Hsiu Wei, Jean-Luc Gaudiot. 592-599
• Timing Analysis and Design Optimization of VLSI Data Flow ArraysSun-Yuan Kung, Sheng-Chun Lo, Paul S. Lewis. 600-607
• Performance Analysis of Dataflow Signal Processing AlgorithmsLeah H. Jamieson, Edward A. Ashcroft. 608-610
• Using Facts for Improving the Parallel Execution of Functional ProgramsAlberto Pettorossi, Andrzej Skowron. 616-623
• A New Structuring Mechanism for Support of Spatially Redundant Distributed ComputationRanga S. Ramanujan, Jon G. Kuhl. 624-627
• Poker on the Cosmic Cube: The First Retargetable Parallel Programming Language and EnvironmentLawrence Snyder, David Socha. 628-635
• Distributed Routing Algorithms for Broadcasting and Personalized Communication in HypercubesChing-Tien Ho, S. Lennart Johnsson. 640-648
• The Architecture of a Homogeneous Vector SupercomputerJohn L. Gustafson, Stuart Hawkinson, Ken Scott. 649-652
• Architecture of a Hypercube SupercomputerJohn P. Hayes, Trevor N. Mudge, Quentin F. Stout. 653-660
• Scaleability of a Binary Tree on a HypercubeSanjay R. Deshpande, Roy M. Jenevein. 661-668
• Systolic Tree Implementation of Data StructuresJik H. Chang, Moon-Jung Chung, Oscar H. Ibarra, Kotesh K. Rao. 669-671
• A Comparative Study of Two Systematic Design Methodologies for Systolic ArraysMatthew T. O Keefe, José A. B. Fortes. 672-675
• Solving Matrix Problems with No Size Restriction on a Systolic Array ProcessorJuan J. Navarro, José M. Llabería, Mateo Valero. 676-683
• PARSOR : A Parallel Processor for Sparse Matrix Solution by SOR IterationDavid A. Arpin, Yongmin Kim. 684-687
• Finding Test-and-Treatment Procedures Using Parallel ComputationLuis D. Duval, Yijie Han, Robert A. Wagner, Donald W. Loveland. 688-690
• A Diffusing Computation for Truth MaintenanceCharles J. Petrie. 691-695
• Representing S-Expressions for the Efficient Evaluation of LISP on Parallel ProcessorsWilliams Ludwell Harrison III, David A. Padua. 703-710
• The Classifier System: A Computational Model that Supports Machine IntelligenceStephanie Forrest. 711-716
• Continuous Speech Recognition on a Butterfly Parallel ProcessorLynn Cosell, Owen Kimball, Richard M. Schwartz, Michael Krasner. 717-720
• A Hyperconcentrator Switch for Routing Bit-Serial MessagesThomas H. Cormen, Charles E. Leiserson. 721-728
• Hardware Extraction of Low-Level Concurrency from Serial Instruction StreamsAugustus K. Uht, Robert G. Wedig. 729-736
• Fault Location in Omega:::r::: Omega:::-1::: NetworksTse-Yun Feng, Wei Young. 737-742
• Impact of Cluster Network Failure on the Performance of Cluster-Based SupersystemsImad Mahgoub, Dharma P. Agrawal. 743-749
• Resource Sharing Interconnection Networks in MultiprocessorsBenjamin W. Wah, Jie-Yong Juang. 750-757
• Application of Data Driven Networks to Sparse Matrix MultiplicationRami G. Melhem. 758-761
• On the Systolic Detection of Shortest RoutesUwe Schwiegelshohn, Lothar Thiele. 762-764
• Synthesizing Non-Uniform Systolic DesignsConcettina Guerra, Rami G. Melhem. 765-772
• Verification of Systolic Arrays: A Stream Function ApproachSanjay V. Rajopadhye, Prakash Panangaden. 773-775
• Synthesizing VLSI Architectures: Dynamic Programming SolverMarina C. Chen. 776-784
• Application of Parallel Processing to Fault SimulationPrabhakar Goel, Chi-Lai Huang, Robert E. Blauth. 785-788
• A Slicing Algorithm of Concurrency Modeling Based on Petri NetsCarl K. Chang, Huiyu Wang. 789-792
• Parallel Entity Centered Simulation on the Butterfly ComputerJohn B. Gilmer Jr., George Hartwig, Louise Kokinakis. 793-795
• A Technique for Simulation of SIMD Signal Processing Algorithms on the PASM Parallel Processing SystemEdward C. Bronson, Leah H. Jamieson, James T. Kuehn. 796-798
• : Multi Grid Algorithms Implemented on EGPA MultiprocessorWolfgang Henning, Jens Volkert. 799-805
• Constructing the Voronoi Diagram on a Mesh-Connected ComputerMi Lu. 806-811
• Optimal Algorithms for Mesh-Connected Parallel Processors with Serial MemoriesRobert Michael Owens, Joseph JáJá. 812-818
• An Efficient Embedding of Large Trees in Processor GridsDuane A. Bailey, Janice E. Cuny. 819-822
• The KAP/205 : An Advanced Source-to-Source Vectorizer for the Cyber 205 SupercomputerChristopher Huson, Thomas Macke, James Davies, Michael Wolfe, Bruce Leasure. 827-832
• The KAP/S-1 : An Advanced Source-to-Source Vectorizer for the S-1 Mark IIa SupercomputerChristopher Huson, Thomas Macke, James Davies, Michael Wolfe, Bruce Leasure. 833-835
• Doacross: Beyond Vectorization for MultiprocessorsRon Cytron. 836-844
• A Large-Grain Data Flow Scheduler for Parallel Processing on CYBERPLUSRobert G. Babb II, Lise Storc, William C. Ragsdale. 845-848
• Macro vs. Micro Dataflow: A Programming ExampleMaya Gokhale. 849-852
• Perfect Graphs and Parallel AlgorithmsDavid P. Helmbold, Ernst W. Mayr. 853-860
• Communication-Efficient Parallel Graph AlgorithmsCharles E. Leiserson, Bruce M. Maggs. 861-868
• Efficient Parallel Algorithms for Graph ModelsClyde P. Kruskal, Larry Rudolph, Marc Snir. 869-876
• A Parallel Algorithm for DominatorsShaunak Pawagi, P. S. Gopalakrishnan, I. V. Ramakrishnan. 877-879
• A Graph Model for Parallel Computations Expressed in the Computation Structures LanguageAshok K. Adiga, James C. Browne. 880-886
• Parallel Parsing on a One-Way Array of Finite-State MachinesJik H. Chang, Oscar H. Ibarra, Michael A. Palis. 887-894
• Parallel Processing of Quadtrees on a Horizontally Reconfigurable Architecture Computing SystemM. Martin, Donald M. Chiarulli, S. Sitharama Iyengar. 895-902
• Trace-Driven Simulations of Parallel and Distributed Algorithms in MultiprocessorsMichel Dubois, Faye A. Briggs, Indira Patil, Meera Balakrishnan. 909-916
• Delta Transformations to Simplify VLSI Processor Arrays for Serial Dynamic ProgrammingRichard J. Lipton, Daniel P. Lopresti. 917-920
• Parallel External MergingEliezer Dekel, Istvan Ozsvath. 921-923
• : Parallel Algorithms for Bucket Sorting and the Data Dependent Prefix ProblemYijie Han, Robert A. Wagner. 924-930
• A Parallel Range Search Algorithm Using Multiple Attribute TreeS. Sitharama Iyengar, Nageswara S. V. Rao, Rangasami L. Kashyap. 931-933
• Design and Evaluation of a Parallel Sort UtilityMicah Beck, Dina Bitton, W. Kevin Wilkinson. 934-941
• A Distributed Implementation Scheme for Communicating ProcessesA. A. Aaby, K. T. Narayana. 942-949
• Intra-Transaction Concurrency in Distributed Databases and Protocols which use Transaction Aborts to Preserve Consistency: A Performance StudyMohan Ahuja, James C. Browne. 950-952
• Speedup Bounds and Processor Allocation for Parallel Programs on MultiprocessorsConstantine D. Polychronopoulos, Utpal Banerjee. 961-968
• A Parallel Execution Scheme for Exploiting and Parallelism of Logic ProgramsVipin Kumar, Yow-Jian Lin. 972-975
• A Parallel Execution Model of Logic Program Based on Dependency Relationship GraphSeungbeom Kim, Seungryoul Maeng, Jung Wan Cho. 976-983
• Detection of and Parallelism in Logic ProgrammingYu-Wen Tung, Dan I. Moldovan. 984-991
• How Good are Parallel and Ordered Depth-First Searches?Benjamin W. Wah, Guo-Jie Li. 992-999
• Counting and Packing in ParallelJoseph Gil, Larry Rudolph. 1000-1002
• Reduction Techniques for Selection in Distributed FilesNicola Santoro, Ed Suen. 1003-1009
• Optimal Parallel Algorithms for Constructing Balanced m-Way Search TreeEliezer Dekel, Shietung Peng, Shietung Iyengar. 1010-1012
• A Stream-Oriented Parallel Processing Scheme for Relational Database OperationsYasushi Kiyoki, Ryuzo Hasegawa, Makoto Amamiya. 1013-1020
• Partitioning Relation for Parallel Processing in Fast Local NetworksClement T. Yu, Keh-Chang Guh, David Brill, Arbee L. P. Chen. 1021-1028
• A Compiler-Assisted Cache Coherence Solution for MultiprcessorsAlexander V. Veidenbaum. 1029-1036
• Load-Balanced Task Allocation in Locally Distributed Computer SystemsMichael J. Carey, Hongjun Lu. 1037-1039
• A Comparative Analysis of Static and Dynamic Load Balancing StrategiesMohammad Ashraf Iqbal, Joel H. Saltz, Shahid H. Bokhari. 1040-1047
• Parallel Processing in Local NetworksGholamali C. Shoja, R. G. Gurr. 1048-1051