Table of Contents

• Real-time processing of noisy RF pulsesMohamed I. Sobhy, Khaled H. Moustafa, Mostafa Y. Makkey. 1-4 [doi]
• A micropower envelope detector for audio applicationsMichael W. Baker, Serhii M. Zhak, Rahul Sarpeshkar. 1-4 [doi]
• A method for generating non-Gaussian noise series with specified probability distribution and power spectrumMinfen Shen, Francis H. Y. Chan, Patch Beadle. 1-4 [doi]
• Classification of BPSK and QPSK signals with unknown signal level using the Bayes techniqueLiang Hong, K. C. Ho. 1-4 [doi]
• Algorithms for nonuniform bandpass sampling in radio receiverYi-Ran Sun, Svante Signell. 1-4 [doi]
• Power factor correction using fractional capacitorsWajdi Ahmad. 5-7 [doi]
• Modeling of accumulation MOS capacitors for high performance analog circuitsAránzazu Otín, Santiago Celma, Concepción Aldea. 5-8 [doi]
• Performance evaluation of optimal DMT transceivers for ADSL applicationShang-Ho Tsai, Yuan-Pei Lin. 5-8 [doi]
• A smart bi-directional telemetry unit for retinal prosthetic deviceRizwan Bashirullah, Wentai Liu, Ying Ji, Gurhan Alper Kendir, Mohanasankar Sivaprakasam, Guoxing Wang, B. Pundi. 5-8 [doi]
• Jointly minimum symbol error rate FIR MIMO transmitter and receiver filters for PAM signal vectorsAre Hjørungnes, Paulo S. R. Diniz. 5-8 [doi]
• A novel homotopy-based algorithm for the closest unstable equilibrium point method in nonlinear stability analysisJaewook Lee. 8-11 [doi]
• A novel channel identification method for fast wireless communication systems with transmitter and receiver diversityHonghui Xu, Soura Dasgupta, Zhi Ding. 9-12 [doi]
• Design of an integrated potentiostat circuit for CMOS bio sensor chipsAlexander Frey, Martin Jenkner, Meinrad Schienle, Christian Paulus, Birgit Holzapfl, Petra Schindler-Bauer, Franz Hofmann, D. Kuhlmeier, J. Krause, J. Albers, W. Gumbrecht, Doris Schmitt-Landsiedel, Roland Thewes. 9-12 [doi]
• A highly linear front-end based on a logarithmic multiplier-filterG. Kathiresan, Emmanuel M. Drakakis, Chris Toumazou. 9-12 [doi]
• Multiple outcomes of idealized switchingPaul Dan Cristea, Rodica Tuduce. 12-15 [doi]
• A novel design technique for very low voltage MOS translinear circuitsAntonio J. López-Martín, Alfonso Carlosena, Jaime Ramírez-Angulo. 13-16 [doi]
• A new timing recovery architecture for fast convergencePiya Kovintavewat, John R. Barry, M. Fatih Erden, Erozan M. Kurtas. 13-16 [doi]
• Distributed neurochemical sensing: in vitro experimentsG. Mulliken, Mihir Naware, A. Bandyopadhyay, Gert Cauwenberghs, Nitish Thakor. 13-16 [doi]
• Sharper bounds for the zeros of polynomialsMohammed A. Hasan. 16-19 [doi]
• A novel channel estimation and tracking method for wireless OFDM systems based on pilots and Kalman filteringYuanjin Zheng. 17-20 [doi]
• Localization of a moving source using TDOA and FDOA measurementsK. C. Ho, Wenwei Xu. 17-20 [doi]
• Visual signal processing and image understanding in biomedical systemsMarek R. Ogiela, Ryszard Tadeusiewicz. 17-20 [doi]
• Subgridding method for speeding up FD-TLM circuit simulationBaohua Wang, Pinaki Mazumder. 20-23 [doi]
• An efficient blood vessel detection algorithm for retinal images using local entropy thresholdingThitiporn Chanwimaluang, Guoliang Fan. 21-24 [doi]
• Implementing Otsu s thresholding process using area-time efficient logarithmic approximation unitH. Tian, Siew Kei Lam, Thambipillai Srikanthan. 21-24 [doi]
• Some structural conditions under which an RLC network is controllable over F(z)Kai-Sheng Lu. 21-24 [doi]
• System observability and nonlinear parameter identification of nonylphenol biodegradation kineticsV. Shah, A. Chaubal, R. R. Ramachandran, Raúl Ordóñez, K. Jahan. 24-27 [doi]
• A multi-level static memory cellPhilipp Häfliger, Håvard Kolle Riis. 25-28 [doi]
• Joint carrier and frame synchronization for MPSK demodulationWei-Ping Zhu, M. Omair Ahmad, M. N. S. Swamy. 25-28 [doi]
• Steady-state properties of the sign algorithm for the constrained adaptive IIR notch filterYegui Xiao, Rabab Kreidieh Ward, Akira Ikuta. 25-28 [doi]
• Public-key encryption based on Chebyshev mapsLjupco Kocarev, Zarko Tasev. 28-31 [doi]
• Enhanced time-frequency features for neonatal EEG seizure detectionHamid Hassanpour, Mostefa Mesbah, Boualem Boashash. 29-32 [doi]
• CMOS optical receiver chipset for gigabit Ethernet applicationsSung-Eun Kim, Seong-Jun Song, Sung Min Park, Hoi-Jun Yoo. 29-32 [doi]
• On the development of a MODEM for data transmission and control of electrical household appliances using the low-voltage power-lineSara Escalera, Carlos M. Domínguez-Matas, José M. García-González, Oscar Guerra, Ángel Rodríguez-Vázquez. 29-32 [doi]
• Robust beamformer design by power minimization and its unconstrained partitioned implementationZhu Liang Yu, Meng Hwa Er. 29-32 [doi]
• New hyperbolic source density models for blind source recovery score functionsKhurram Waheed, Fathi M. Salem. 32-35 [doi]
• Reconfigurable memory bus systems using multi-Gbps/pin CDMA I/O transceiversJongsun Kim, Zhiwei Xu, Mau-Chung Frank Chang. 33-36 [doi]
• A biased low-voltage BiCMOS mixer for direct up-conversionEsa Tiiliharju, Kari Halonen. 33-36 [doi]
• A memory efficient realization of cyclic convolution and its application to discrete cosine transformHun-Chen Chen, Jiun-In Guo, Chein-Wei Jen. 33-36 [doi]
• An optimal feature set for seizure detection systems for newborn EEG signalsPega Zarjam, Mostefa Mesbah, Boualem Boashash. 33-36 [doi]
• Blind adaptive equalizer based on locally generated sub-carrierJ. Okello, M. Mizuno, H. Ochi, Y. Itoh. 36-39 [doi]
• IP based reconfigurable digital platform for satellite communicationsGian-Carlo Cardarilli, Andrea Del Re, Marco Re. 37-40 [doi]
• A high-resolution and fast-conversion time-to-digital converterChorng-Sii Hwang, Poki Chen, Hen-Wai Tsao. 37-40 [doi]
• Bit rate optimized time-domain equalizers for DMT systemsChun-Yang Chen, See-May Phoong. 37-40 [doi]
• An ultra low-power dynamic translinear cardiac sense amplifier for pacemakersSandro A. P. Haddad, Sebastian Gieltjes, Richard Houben, Wouter A. Serdijn. 37-40 [doi]
• Fast algorithms for computing full and reduced rank Wiener filtersMohammed A. Hasan, Mahmood R. Azimi-Sadjadi. 41-44 [doi]
• A micropower analog VLSI processing channel for bionic ears and speech-recognition front endsTimothy Kuan-Ta Lu, Michael W. Baker, Christopher D. Salthouse, Ji-Jon Sit, Serhii M. Zhak, Rahul Sarpeshkar. 41-44 [doi]
• A reconfigurable channel codec coprocessor for software radio multimedia applicationsAndrea Pacifici, C. Vendetti, Fabrizio Frescura, Saverio Cacopardi. 41-44 [doi]
• High performance CMOS current-mode precision full-wave rectifier (PFWR)Surachet Khucharoensin, Varakorn Kasemsuwan. 41-44 [doi]
• Blind signal separation using fixed overcomplete basis function dictionariesP. Sugden, Cedric Nishan Canagarajah. 44-47 [doi]
• A highly efficient reconfigurable architecture for an UTRA-TDD mobile station receiverR. Vejanovski, Aleksandar Stojcevski, Jugdutt Singh, M. Faulkner, Aladin Zayegh. 45-48 [doi]
• A high-rate frequency shift keying demodulator chip for wireless biomedical implantsMaysam Ghovanloo, Khalil Najafi. 45-48 [doi]
• A time-continuous optimization method for automatic adjustment of gain and phase imbalances in feedforward and LINC transmittersBo Shi, Lars Sundström. 45-48 [doi]
• A 2048 complex point FFT processor using a novel data scaling approachThomas Lenart, Viktor Öwall. 45-48 [doi]
• A very low-power 8-bit Sigma-Delta converter in a 0.8µm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 VAndrea Gerosa, Andrea Neviani. 49-52 [doi]
• Configurable preamble synchronizer for slotted random access in W-CDMA applicationsChi-Fang Li, Wern-Ho Sheen, Fu-Chang Chuang, Yuan-Sun Chu. 49-52 [doi]
• A BiCMOS 10Gb/s adaptive cable equalizerGuangyu Zhang, Pruthvi (Peter) Chaudhari, Michael M. Green. 49-52 [doi]
• A 1.8 V 10-bit 80 MS/s low power track-and-hold circuit in a 0.18µm CMOS processErik Sall. 53-56 [doi]
• Low hardware complexity parallel turbo decoder architectureZhongfeng Wang, Yiyan Tang, Yuke Wang. 53-56 [doi]
• Use of noise shaping for rate conversion in oversampled video signalsIvan Ryan, Oliver McCarthy. 53-56 [doi]
• A cortical stimulator with monitoring capabilities using a novel 1 Mbps ASK data linkJonathan Coulombe, Jean-François Gervais, Mohamad Sawan. 53-56 [doi]
• Structural analysis of a one-port formed by a resistively coupled nonlinear ringStefano Pastore. 56-59 [doi]
• Integrated inductors over MOSFETs - experimental results of a three dimensional integrated structureN. Nastos, Yannis Papananos. 57-60 [doi]
• Architecture-aware low-density parity-check codesMohammad M. Mansour, Naresh R. Shanbhag. 57-60 [doi]
• Generation of embedding watermark signals from reference watermark of the detectorTae-young Kim, Taejeong Kim, Kiryung Lee. 57-60 [doi]
• VLSI implementation of wireless bi-directional communication circuits for micro-stimulatorShuenn-Yuh Lee, Shyh-Chyang Lee, Jia-Jin Jason Chen. 57-60 [doi]
• A new approach to generate hyperchaotic 3D-scroll attractors in a closed chain of Chua s circuitsDonato Cafagna, Giuseppe Grassi. 60-63 [doi]
• A CMOS micro-power wideband data/power transfer system for biomedical implantsO. Omeni, Chris Toumazou. 61-64 [doi]
• A resonant pad for ESD protected narrowband CMOS RF applicationsJ. Shorb, Xiaoyong Li, David J. Allstot. 61-64 [doi]
• Efficient signal processing in embedded Java systemsRafael Krapf, Luigi Carro. 61-64 [doi]
• A massively scaleable decoder architecture for low-density parity-check codesAnand Selvarathinam, Gwan Choi, Krishna Narayanan, Achal Prabhakar, Euncheol Kim. 61-64 [doi]
• Stabilizing unstable equilibrium points of chaotic systems using PI regulatorGuo-Ping Jiang, Suo-Ping Wang. 64-67 [doi]
• An efficient split-radix FFT algorithmSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 65-68 [doi]
• Implementation of a parallel turbo decoder with dividable interleaverJaeyoung Kwak, Sook Min Park, Sang-Sic Yoon, Kwyro Lee. 65-68 [doi]
• A CMOS current-to-LCD interface for portable amperometric sensing systemsKarn Opasjumruskit, Naiyavudhi Wongkomet. 65-68 [doi]
• Analysis of shielded planar circuits by a mixed variational-spectral methodMohamed Lamine Tounsi, H. Halheit, Mustapha Chérif-Eddine Yagoub, Abdfelhamid Khodja. 65-68 [doi]
• Chaos in cross-coupled BVP oscillatorsTetsushi Ueta, Hiroshi Kawakami. 68-71 [doi]
• Design of soft-output Viterbi decoders with hybrid trace-back processingYun-Nan Chang. 69-72 [doi]
• A 7 milliwatt 1GBPS CMOS optical receiver for through wafer communicationAlyssa B. Apsel, Andreas G. Andreou. 69-72 [doi]
• xLIW - a scaleable long instruction wordChristian Panis, Raimund Leitner, Herbert Grünbacher, Jari Nurmi. 69-72 [doi]
• Performance of an adaptive homodyne receiver in the presence of multipath, Rayleigh-fading and time-varying quadrature errorsEdiz Çetin, Izzet Kale, Richard C. S. Morling. 69-72 [doi]
• A hyperchaotic circuit family including a dependent switched capacitorYusuke Takahashi, Hidehiro Nakano, Toshimichi Saito. 72-75 [doi]
• A high-bandwidth wireless infrared receiver with feedforward offset extractorChin-Shan Hsieh, Hong-Yi Huang, Jeng-Dang Juan, Ruey-Nan Yeh. 73-76 [doi]
• Alternative Direct Digital Frequency Synthesizer architectures with reduced memory sizeDimitrios Soudris, Marios Kesoulis, C. Koukourlis, Adonios Thanailakis, Spyros Blionas. 73-76 [doi]
• Field programmable gate arrays and analog implementation of BRIN for optimization problemsH. S. Ng, Sui-Tung Mak, Kai-Pui Lam. 73-76 [doi]
• On-line signature verification method utilizing feature extraction based on DWTIsao Nakanishi, Naoto Nishiguchi, Yoshio Itoh, Yutaka Fukui. 73-76 [doi]
• Normal forms of border collisions in high-dimensional nonsmooth mapsMario di Bernardo. 76-79 [doi]
• A low-power, memoryless direct digital frequency synthesizer architectureK. I. Palomaki, Jarkko Niittylahti. 77-80 [doi]
• A low-complexity power-efficient signaling scheme for chip-to-chip communicationKamran Farzan, David A. Johns. 77-80 [doi]
• Design of a digital reaction-diffusion system for restoring blurred fingerprint imagesKoichi Ito, Takafumi Aoki, Tatsuo Higuchi. 77-80 [doi]
• A 10 milliwatt 2 Gbps CMOS optical receiver for optoelectronic interconnectAlyssa B. Apsel, Andreas G. Andreou. 77-80 [doi]
• Movement of small amplitude parts in a coupled chaotic systemYasuteru Hosokawa, Yoshifumi Nishio. 80-83 [doi]
• Quadrature direct digital frequency synthesizer using an angle rotation algorithmF. Curticapean, K. I. Palomaki, Jarkko Niittylahti. 81-84 [doi]
• An adaptive silicon synapseElisabetta Chicca, Giacomo Indiveri, Rodney J. Douglas. 81-84 [doi]
• A discrete fractional Fourier transform based on orthonormalized McClellan-Parks eigenvectorsMagdy T. Hanna. 81-84 [doi]
• Generation of multi-scroll chaos using second-order linear systems with hysteresisFengling Han, Xinghuo Yu, Guanrong Chen, Wenbo Liu, Yong Feng. 84-87 [doi]
• Fast Integer Fourier Transform (FIFT) based on lifting matricesR. Thamvichai, Tamal Bose, Milena Radenkovic. 85-88 [doi]
• Signaling capacity of FR4 PCB traces for chip-to-chip communicationMarcus van Ierssel, Tooraj Esmailian, Ali Sheikholeslami, P. S. Pasupathy. 85-88 [doi]
• Analog-decoder experiments with subthreshold CMOS soft-gatesMatthias Frey, Hans-Andrea Loeliger, Felix Lustenberger, Patrick Merkli, Patrik Strebel. 85-88 [doi]
• A novel frequency synthesizer concept for wireless communicationsCésar Caballero Gaudes, Mikko Valkama, Markku Renfors. 85-88 [doi]
• Reconstruction of piecewise chaotic dynamics using a multiple model approachNan Xie, Henry Leung. 88-91 [doi]
• A symmetric miniature 3D inductorSrinivas Kodali, David J. Allstot. 89-92 [doi]
• Saving the bandwidth in the fractional domain by generalized Hilbert transform pair relationsSoo-Chang Pei, Jian-Jiun Ding. 89-92 [doi]
• A CMOS charge pump for sub-2.0 V operationKuo-Hsing Cheng, Chung-Yu Chang, Chia-Hung Wei. 89-92 [doi]
• Synchronization of fractional interval counter in non-integer ratio sample rate convertersJaakko Ketola, Jouko Vankka, Kari Halonen. 89-92 [doi]
• Delays in PWM control loops imply discontinuity in sampled data models of power electronic circuitsSoumitro Banerjee, Sukanya Parui. 92-95 [doi]
• On-chip inductor structures: a comparative studySrinivas Kodali, Taeik Kim, David J. Allstot. 93-96 [doi]
• An innovative scheduling scheme for high-speed network processorsIoannis Papaefstathiou, Helen-Catherine Leligou, Theofanis Orphanoudakis, George Kornaros, Nicholaos Zervos, George E. Konstantoulakis. 93-96 [doi]
• Angular decompositions for the discrete fractional signal transformsMin-Hung Yeh. 93-96 [doi]
• New dynamic logic-level converters for high performance applicationNam-Seog Kim, Yong-Jin Yoon, Uk-Rae Cho, Hyun-Geun Byun. 93-96 [doi]
• Transient dynamics and chaos observed in strongly nonlinear mutually-coupled oscillatorsT. Endo, Y. Aruga, K. Yamauchi. 96-99 [doi]
• RF transformer as a directional coupler with arbitrary loadJanusz Biernacki, Dariusz Czarkowski. 97-100 [doi]
• Efficient pruning algorithms for the DFT computation for a subset of output samplesSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 97-100 [doi]
• Design of 2.5 V/5 V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuitMing-Dou Ker, Chia-Sheng Tsai. 97-100 [doi]
• Control and synchronization of a 4-scroll chaotic systemWenbo Liu, Guanrong Chen. 100-103 [doi]
• An improved link price algorithm for Internet flow controlDongliang Guan, Songyu Yu. 101-104 [doi]
• Area-efficient memory-based architecture for FFT processingSang-chul Moon, In-Cheol Park. 101-104 [doi]
• A DC current measurement circuit for on-chip applicationsC. K. L. Tam, Gordon W. Roberts. 101-104 [doi]
• A robust wideband array beamformer using fan filterZhu Liang Yu, Qiyue Zou, Meng Hwa Er. 101-104 [doi]
• A regularized simultaneous autoregressive model for texture classificationYao-wei Wang, Yan-fei Wang, Wen Gao, Yong Xue. 105-108 [doi]
• A digitally skew correctable multi-phase clock generator using a master-slave DLLAtsushi Suzuki, Shoji Kawahito, Daisuke Miyazaki, Masanori Furuta. 105-108 [doi]
• Wire-speed traffic management in Ethernet switchesShridhar Mubaraq Mishra, A. Guruprasad, Chun Feng Hu, Pramod K. Pandey, Ming Hung. 105-108 [doi]
• Optimization of power consumption for an ARM7-based multimedia handheld deviceHoseok Chang, Wonchul Lee, Wonyong Sung. 105-108 [doi]
• A simple nonautonomous chaotic circuit with a periodic pulse-train inputHidehiro Nakano, Keita Miyachi, Toshimichi Saito. 108-111 [doi]
• Efficient frequency estimation using the pulse-pair method at different lagsSaman S. Abeysekera. 109-112 [doi]
• A self-testing method for the pipelined A/D converterJ. Yoo, E. Lee, Earl E. Swartzlander Jr.. 109-112 [doi]
• Loop scheduling for minimizing schedule length and switching activitiesZili Shao, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai. 109-112 [doi]
• Precoded OFDM for power line broadband communicationFethi Tlili, Fatma Rouissi, Adel Ghazel. 109-112 [doi]
• Complex behaviours in two bi-directionally coupled Lorenz systemsSilvano Cincotti, Simona Di Stefano. 112-115 [doi]
• Performance analysis of algorithmic noise-tolerance techniquesByonghyo Shim, Naresh R. Shanbhag. 113-116 [doi]
• Synthesis of a pulse-forming reactance network to shape a delayed quasi-rectangular pulseIgor M. Filanovsky, P. N. Matkhanov. 113-116 [doi]
• Buffer implementation for Proteo network-on-chipIlkka Saastamoinen, M. Alho, Jari Nurmi. 113-116 [doi]
• Variable delay ripple carry adder with carry chain interrupt detectionAndreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner. 113-116 [doi]
• Advanced chaos-based frequency modulations for clock signals EMC tuningStefano Santi, Riccardo Rovatti, Gianluca Setti. 116-119 [doi]
• 5 GHz pipelined multiplier and MAC in 0.18µm complementary static CMOSJos Sulistyo, Dong Sam Ha. 117-120 [doi]
• VLSI design of turbo decoder for integrated communication system-on-chip applicationsWai-Chi Fang, Anand Sethuraman, K. Belevi. 117-120 [doi]
• A minimum variance filter for discrete-time linear systems perturbed by unknown nonlinearitiesAlfredo Germani, Costanzo Manes, Pasquale Palumbo. 117-120 [doi]
• Modeling all-MOS log filters and its application to Sigma-Delta modulatorsJofre Pallares, Justo Sabadell, Francesc Serra-Graells. 117-120 [doi]
• Bifurcations and chaos in the turbo decoding algorithmZarko Tasev, Ljupco Kocarev, Gian Mario Maggio. 120-123 [doi]
• Implementation of a programmable 64/spl sim/2048-point FFT/IFFT processor for OFDM-based communication systemsJen-Chih Kuo, Ching-Hua Wen, An-Yeu Wu. 121-124 [doi]
• Analog wavelet transform employing dynamic translinear circuits for cardiac signal characterizationSandro A. P. Haddad, Richard Houben, Wouter A. Serdijn. 121-124 [doi]
• A 3.3 V 1 GHz low-latency pipelined Booth multiplier with new Manchester carry-pass adderHwang-Cherng Chow, I-Chyn Wey. 121-124 [doi]
• On-line high-radix exponential with selection by roundingJosé-Alejandro Piñeiro, Javier D. Bruguera, Milos D. Ercegovac. 121-124 [doi]
• Optimization of 3-phase spreading sequences of Markov chainsHiroshi Fujisaki. 124-127 [doi]
• Fast implementations of Montgomery s modular multiplication algorithmP. V. Ananda Mohan. 125-128 [doi]
• A computational technique and a VLSI architecture for digital pulse shaping in OFDM modemsEleni Fotopoulou, Vassilis Paliouras, Thanos Stouraitis. 125-128 [doi]
• Low cost logarithmic techniques for high-precision computationsSiew Kei Lam, Devendra K. Chaudhaiy, Thambipillai Srikanthan. 125-128 [doi]
• A low voltage second order biquad using pseudo floating-gate transistorsØivind Næss, Espen A. Olsen, Yngvar Berg, Tor Sverre Lande. 125-128 [doi]
• Gibbs-like phenomena in chaos-based frequency modulated signalsStefano Santi, Riccardo Rovatti, Gianluca Setti. 128-131 [doi]
• A methodology for implementing FIR filters and CAD tool development for designing RNS-based systemsDimitrios Soudris, K. Sgouropoulos, Konstantinos Tatas, Vasilis F. Pavlidis, Adonios Thanailakis. 129-132 [doi]
• Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding outputSai-Weng Sin, Seng-Pan U., Rui Paulo Martins, José E. Franca. 129-132 [doi]
• GDFT types mapping algorithms and structured regular FPGA implementationH. I. Saleh, M. A. Ashour, Aly E. Salama. 129-132 [doi]
• An efficient memory-based FFT architectureChao-Kai Chang, Chung-Ping Hung, Sau-Gee Chen. 129-132 [doi]
• Controlling bifurcation and chaos in Internet congestion control modelLiang Chen, Xiao Fan Wang, Zheng Zhi Han. 132-135 [doi]
• A flexible LUT-based carry chain for FPGAsAndrea Lodi 0002, Carlo Chiesa, Fabio Campi, Mario Toma. 133-136 [doi]
• Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiverNuno F. Paulino, M. Serrazina, João Goes, Adolfo Steiger-Garção. 133-136 [doi]
• A high-speed, low latency RSA decryption silicon coreCiaran McIvor, Máire McLoone, John V. McCanny. 133-136 [doi]
• A continuous flow mixed-radix FFT architecture with an in-place algorithmJaehyun Baek, Byung S. Son, Byung G. Jo, Myung Hoon Sunwoo, Seung Keun Oh. 133-136 [doi]
• Nonautonomous pulse-driven chaotic oscillator based on Chua s circuitAhmed S. Elwakil. 136-139 [doi]
• eUTDSP: a design study of a new VLIW-based DSP architectureG. R. Chaji, R. M. Pourrad, Seid Mehdi Fakhraie, Mohammad H. Tehranipour. 137-140 [doi]
• Low-error fixed-width squarer designK. J. Cho, E. M. Choi, J. G. Chung, M. S. Lim, J. W. Kim. 137-140 [doi]
• Resistive FET IQ vector modulator using multilayer photoimageable thick-film technologyCheuk-Yiu Ng, Mitchai Chongcheawchamnan, Ian D. Robertson, K. Cho. 137-140 [doi]
• Generation of homoclinic oscillation in coupled Chua s oscillatorsSyamal Kumar Dana, Satyabrata Chakraborty, Prodyot Kumar Roy. 140-143 [doi]
• Area-time optimal adder with relative placement generatorAamir A. Farooqui, Vojin G. Oklobdzija, Sadiq M. Sait. 141-144 [doi]
• Efficient design of perfect-reconstruction biorthogonal cosine-modulated filter banks using convex Lagrangian relaxation and alternating -space projectionsWu-Sheng Lu, Robert Bregovic, Tapio Saramäki. 141-144 [doi]
• Enhancement of data transmission in OFDM-WLAN system using transmit diversityT. Jitrangsri, Suvepon Sittichivapak. 141-144 [doi]
• High-speed low input impedance CMOS current comparatorSurachet Khucharoensin, Varakorn Kasemsuwan. 141-144 [doi]
• ML frame synchronization for IEEE 802.11a WLANs on multipath Rayleigh fading channelsYik-Chung Wu, Kun-Wah Yip, Tung-Sang Ng. 145-148 [doi]
• Three classes of IIR complementary filter pairs with an adjustable crossover frequencyLjiljana D. Milic, Tapio Saramäki. 145-148 [doi]
• About the performances of the Advanced Encryption Standard in embedded systems with cache memoryGuido Bertoni, A. Bircan, Luca Breveglieri, Pasqualina Fragneto, Marco Macchetti, Vittorio Zaccaria. 145-148 [doi]
• Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generationGuiomar Evans, João Goes, Adolfo Steiger-Garção, Manuel Duarte Ortigueira, Nuno F. Paulino, Jilseph Lopes Silva. 145-148 [doi]
• An efficient inverse multiplier/divider architecture for cryptography systemsJunhyung Um, Sangwoo Lee, Youngsoo Park, SungIk Jun, Thewhan KimU. 149-152 [doi]
• A new class of even length wavelet filtersDavid B. H. Tay. 149-152 [doi]
• Combining adaptive smoothing and decision-directed channel estimation schemes for OFDM WLAN systemsHsuan-Yu Liu, Yi-Hsin Yu, Chien-Jen Hung, Temg-Yin Hsu, Chen-Yi Lee. 149-152 [doi]
• A CMOS neural oscillator using negative resistanceHan Jung Song, John G. Harris. 152-155 [doi]
• A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systemsHsin-Lei Lin, Robert C. Chang, Chih-Hao Huang, Hongchin Lin. 153-156 [doi]
• SDP for multi-criterion QMF bank designH. D. Tuan, L. H. Nam, H. Tuy, T. Q. Nguyen. 153-156 [doi]
• On the hardware implementations of the SHA-2 (256, 384, 512) hash functionsNicolas Sklavos, Odysseas G. Koufopavlou. 153-156 [doi]
• A novel 1-V class-AB transconductor for improving speed performance in SC applicationsGianluca Giustolisi, Gaetano Palumbo. 153-156 [doi]
• Controlling chaos via second-order sliding modesBarbara Cannas, S. Cincotti, Alessandro Pisano, Mariangela Usai. 156-159 [doi]
• Efficient implementation of complex exponentially-modulated filter banksJuuso Alhava, Ari Viholainen, Markku Renfors. 157-160 [doi]
• A fast-serial finite field multiplier without increasing the number of registersWonjong Kim, Seungchul Kim, Hanjin Cho, Kwang-youb Lee. 157-160 [doi]
• A new 1.5V linear transconductor with high output impedance in a large bandwidthJ. Martinez-Heredia, Antonio Jesús Torralba Silgado, Ramón González Carvajal, Jaime Ramírez-Angulo. 157-160 [doi]
• A high speed complex adaptive filter for an asymmetric wireless LAN using a new quantized polynomial representationAdesh Garg, Ian Steiner, Graham A. Jullien, James W. Haslett, G. H. McGibney. 157-160 [doi]
• A novel low phase noise 1.8V 900MHz CMOS voltage controlled ring oscillatorDean A. Badillo, Sayfe Kiaei. 160-163 [doi]
• A 2GHz image-reject receiver in a low IF architecture fabricated in a 0.1µm CMOS technologyMagnus Wiklund, Stefan Nilsson, Christian Bjork, Sven Mattisson. 161-164 [doi]
• Shift-accumulator ALU centric JPEG2000 5/3 lifting based discrete wavelet transform architectureK.-C. B. Tan, T. Arslan. 161-164 [doi]
• A wide linear range low-voltage transconductorAdrian Leuciuc. 161-164 [doi]
• Some characterizations of interval systems: further extensions and applicationsLong Wang. 164-167 [doi]
• Self tuned fully integrated high image rejection low IF receivers: architecture and performanceYuanjin Zheng, C. B. Terry. 165-168 [doi]
• Constant-g/sub m/ constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell librariesJuan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín. 165-168 [doi]
• High-speed tunable fractional-delay allpass filter structureJi-Suk Park, Byeong-Kuk Kim, Jin-Gyun Chung, Keshab K. Parhi. 165-168 [doi]
• Design of a self-timed asynchronous parallel FIR filter using CSCDHarri Lampinen, Pauli Perälä, Olli Vainio. 165-168 [doi]
• An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximationXuan Zeng, Jun Tao, Yangfeng Su, Wenbing Chen, Dian Zhou. 168-171 [doi]
• An auto-input-offset removing floating gate pseudo-differential transconductorTimothy G. Constandinou, Julius Georgiou, Chris Toumazou. 169-172 [doi]
• Design of ultraspherical windows with prescribed spectral characteristicsStuart W. A. Bergen, Andreas Antoniou. 169-172 [doi]
• A complex charge sampling scheme for complex IF receiversSami Karvonen, Thomas Riley, Juha Kostamovaara. 169-172 [doi]
• Accurate delay model and experimental verification for current/voltage mode on-chip interconnectsRizwan Bashirullah, Wentai Liu, Ralph K. Cavin III. 169-172 [doi]
• A technique for DC-offset removal and carrier phase error compensation in integrated wireless receiversS. Shang, Shahriar Mirabbasi, Resve A. Saleh. 173-176 [doi]
• High gain GaAs 10Gbps transimpedance amplifier with integrated bondwire effectsMiguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas, M. Gloanec, E. Leclerc, Bernard Lefebvre. 173-176 [doi]
• Analytical design of fractional Hilbert transformer using fractional differencingChien-Cheng Tseng. 173-176 [doi]
• Area-effective FIR filter design for multiplier-less implementationTay-Jyi Lin, Tsung-Hsun Yang, Chein-Wei Jen. 173-176 [doi]
• Generation of n-scroll chaos using nonlinear transconductorsK. N. Salama, Serdar Özoguz, Ahmed S. Elwakil. 176-179 [doi]
• A broadband upconverter unit for double-conversion receiversKari Stadius, Arto Malinen, Petteri Paatsila, Kari Halonen. 177-180 [doi]
• An approach for improving the speed of content addressable memoriesI. M. Hyjazie, Chunyan Wang. 177-180 [doi]
• An integrated multi-scroll circuit with floating-gate MOSFETsTetsuya Fujiwara, Yoshihiko Horio, Kazuyuki Aihara. 180-183 [doi]
• A 10Gb/s CDR with a half-rate bang-bang phase detectorM. Ramezani, C. Andre T. Salama. 181-184 [doi]
• Capacitively coupled multiple resonance networksAntônio Carlos M. de Queiroz. 181-184 [doi]
• Watermarking based IP core protectionYu-Cheng Fan, Hen-Wai Tsao. 181-184 [doi]
• Reduce the complexity of frequency-response masking filter using multiplication free filterChun Zhu Yang, Yong Lian. 181-184 [doi]
• Topological criteria for switched mode DC-DC convertersMasato Ogata, Tetsuo Nishi. 184-187 [doi]
• Clock recovery circuit with adiabatic technology (quasi-static CMOS logic)W. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun. 185-187 [doi]
• History-based memory mode prediction for improving memory performanceSeong-Il Park, In-Cheol Park. 185-188 [doi]
• New designs of frequency selective FIR digital filtersIshtiaq Rasool Khan, Masahiro Okuda, Ryoji Ohba. 185-188 [doi]
• Digitally tuneable on-chip resistor in CMOS for high-speed data transmissionKyoung-Hoi Koo, Jin-Ho Seo, Joe-Whui Kim. 185-188 [doi]
• A heteroclinic point and basin boundaries in a piecewise linear chaotic neuron modelHiroto Tanaka, Toshimitsu Ushio. 188-191 [doi]
• A 1.8V 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applicationsBaoyong Chi, Bingxue Shi. 188-191 [doi]
• Design of 2-D variable fractional delay FIR filter using 2-D differentiatorsChien-Cheng Tseng. 189-192 [doi]
• A coding method for 123 decision diagram pass transistor logic circuit synthesisMutlu Avci, Tülay Yildirim. 189-192 [doi]
• Simple noise formulas for MOS analog designAlfredo Arnaud, Carlos Galup-Montoro. 189-192 [doi]
• An interval algorithm for finding all solutions of nonlinear resistive circuitsKiyotaka Yamamura, Naoya Igarashi, Yasuaki Inoue. 192-195 [doi]
• An accurate current source with on-chip self-calibration circuits for low-voltage differential transmitter driversGuangbin Zhang, Jin Liu, Sungyong Jung. 192-195 [doi]
• Novel recharge semi-floating-gate CMOS logic for multiple-valued systemsYngvar Berg, Snorre Aunet, Omid Mirmotahari, Mats Høvin. 193-196 [doi]
• Some observations on multiplierless implementation of linear phase FIR filtersMrinmoy Bhattacharya, Tapio Saramäki. 193-196 [doi]
• An heuristic circuit-generation technique for the design-automation of analog circuitsEsteban Tlelo-Cuautle, Alejandro Díaz-Sánchez. 193-196 [doi]
• A mixed-mode delay-locked loop for wide-range operation and multiphase outputsKuo-Hsing Cheng, Yu-lung Lo, Wen Fang Yu. 196-199 [doi]
• An effective initial solution algorithm for globally convergent homotopy methodsYasuaki Inoue, Saeko Kusanobu, Kiyotaka Yamamura, M. Ando. 196-199 [doi]
• An efficient transistor optimizer for custom circuitsXiao Yan-Yu, Vojin G. Oklobdzija, William W. Walker. 197-200 [doi]
• A systematic technique for optimizing one-stage two-filter linear-phase FIR filters for sampling rate conversionPeyman Arian, Tapio Saramäki. 197-200 [doi]
• Design and optimization of low-voltage two-stage CMOS amplifiers with enhanced performanceRomero Tavares, B. Vaz, João Goes, Nuno F. Paulino, Adolfo Steiger-Garção. 197-200 [doi]
• A linearized 2-GHz SiGe low noise amplifier for direct conversion receiverJ. Kaukovuori, Mikko Hotti, Jussi Ryynänen, Jarkko Jussila, Kari Halonen. 200-203 [doi]
• Creating implicit homotopy methods using Hardware Description LanguagesLeonid B. Goldgeisser. 200-203 [doi]
• Compact integrated transconductance amplifier circuit for temporal differentiationAlan A. Stocker. 201-204 [doi]
• Concise representation and cellular structure for universal maximally flat FIR filtersSaed Samadi, Akinori Nishihara. 201-204 [doi]
• Co-existence of chaos-based and conventional digital communication systemsFrancis Chi-Moon Lau, C. K. Tse. 204-207 [doi]
• Design of CMOS CML circuits for high-speed broadband communicationsMichael M. Green, Ullas Singh. 204-207 [doi]
• Design and implementation of a reconfigurable FIR filterKuan-Hung Chen, Tzi-Dar Chiueh. 205-208 [doi]
• LNA design optimization with reference to ESD protection circuitryS. Sridharan, Ghanshyam Nayak, P. R. Mukund. 205-208 [doi]
• A zero-time-overhead asynchronous four-phase controllerNattha Sretasereekul, Hiroshi Saito, Masashi Imai, Euiseok Kim, Metehan Özcan, K. Thongnoo, Hiroshi Nakamura, Takashi Nanya. 205-208 [doi]
• Performance analysis of multiple access chaotic-sequence spread-spectrum communication systems employing parallel interference cancellation detectorsWai Man Tam, Francis Chi-Moon Lau, C. K. Michael Tse. 208-211 [doi]
• Design of ultra high-speed CMOS CML buffers and latchesPayam Heydari, Ravindran Mohanavelu. 208-211 [doi]
• A novel noise optimization design technique for radio frequency low noise amplifiersByunghoo Jung, Anand Gopinath, Ramesh Harjani. 209-212 [doi]
• A new robust handshake for asymmetric asynchronous micro-pipelinesKuo-Hsing Cheng, Yang-Han Lee, Wei-Chun Chang. 209-212 [doi]
• Design of IIR digital allpass filters using least pth phase error criterionChien-Cheng Tseng. 209-212 [doi]
• Synchronization of a network of intermittently coupled capacitor circuitsJ. Shimakawa, T. Saito. 212-215 [doi]
• A novel estimator for the velocity of a mobile station in a micro-cellular systemGhasem Azemi, Bouchra Senadji, Boualem Boasha. 212-215 [doi]
• Design of IIR digital filters in the complex domain by transforming the desired responseTatsuya Matsunaga, Masahiro Yoshida, Masaaki Ikehara. 213-216 [doi]
• Partial stability of discontinuous dynamical systems under arbitrary initial z-perturbationsYe Sun, Anthony N. Michel. 216-219 [doi]
• High loop-filter-order /spl Sigma//spl Delta/-fractional-n frequency synthesizers for use in frequency-hopping-spread-spectrum communication-systemsN. Christoffers, R. Kokozinski, Stephan Kolnsberg, Bedrich J. Hosticka. 216-219 [doi]
• A generalized direct-form II transposed structure for IIR filter implementation with minimal roundoff noise gainG. Li, Z. X. Zhao, J. X. Hao. 217-220 [doi]
• Design of a switch for network on chip applicationsPartha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh. 217-220 [doi]
• Dual-band sub-1 V CMOS LNA for 802.11a/b WLAN applicationsTommy Kwong-Kin Tsang, Mourad N. El-Gamal. 217-220 [doi]
• L::2:: gain analysis for switched symmetric systems with time delay under arbitrary switchingGuisheng Zhai, Xinkai Chen, Ye Sun, Anthony N. Michel. 220-223 [doi]
• Low noise amplifier design for ultra-wideband radioJongrit Lerdworatawee, Won Namgoong. 221-224 [doi]
• Modulo (2:::p::: ± 1) multipliers using a three-operand modular addition and Booth recoding based on signed-digit number arithmeticS. Wei, K. Shimizu. 221-224 [doi]
• Fast-polarization-hopping transmit-diversity to mitigate prolonged deep fadesKainam Thomas Wong, S. L. A. Chan, R. P. Torres. 224-227 [doi]
• Architectural design and analysis toolbox to implement shortest path algorithms in hardwareK. H. Quek, Siew Kei Lam, N. K. Agrawal, Thambipillai Srikanthan. 224-227 [doi]
• Filter structures for decimation: a comparisonArtur Wróblewski, Josef A. Nossek. 225-228 [doi]
• A systematic methodology for designing area-time efficient parallel-prefix modulo 2/sup n/ - 1 addersGiorgos Dimitrakopoulos, Haridimos T. Vergos, Dimitris Nikolos, Costas Efstathiou. 225-228 [doi]
• A 1-V CMOS output stage with high linearityWalter Aloisi, Gianluca Giustolisi, Gaetano Palumbo. 225-228 [doi]
• Using FPGAs to solve the Hamiltonian cycle problemMicaela Serra, Kenneth B. Kent. 228-231 [doi]
• Space-time equalizer for advanced 3GPP WCDMA mobile terminal: experimental resultsA. S. Madhukumar, Z. Guo Ping, T. Kian Seng, Y. Kuck Jong, Tim Zhong Mingqian, T. Y. Hong, Francois P. S. Chin. 228-231 [doi]
• High-radix redundant circuits for RNS modulo r:::n:::-1, r:::n:::, or r:::n:::+1Ioannis Kouretas, Vassilis Paliouras. 229-232 [doi]
• A new rail-to-rail driving scheme and a low-power high-speed output buffer amplifier for AMLCD column driver applicationChih-Wen Lu. 229-232 [doi]
• An optimal entropy coding scheme for efficient implementation of pulse shaping FIR filters in digital receiversA. Prasad Vinod, A. Benjamin Premkumar, Edmund Ming-Kit Lai. 229-232 [doi]
• Global scheduling and register allocation based on predicated executionRogério Xavier de Azambuja, Luiz C. V. dos Santos. 232-235 [doi]
• A novel pilot structure for the downlink transmission of cyclic prefix assisted single carrier CDMA system with frequency domain equalisationA. S. Madhukumar, Francois P. S. Chin, Ying-Chang Liang. 232-235 [doi]
• A new method for evaluating harmonic distortion in push-pull output stagesGianluca Giustolisi, Gaetano Palumbo. 233-236 [doi]
• Exponentially-modulated filter bank-based transmultiplexerJuuso Alhava, Markku Renfors. 233-236 [doi]
• Area efficient, high speed parallel counter circuits using charge recycling threshold logicPeter Celinski, Derek Abbott, Sorin Cotofana. 233-236 [doi]
• Peak-to-average power-ratio reduction via channel hopping for downlink CDMA systemsYajun Kou, Wu-Sheng Lu, Andreas Antoniou. 236-239 [doi]
• A 2-approximation algorithm FSA+1 to (lambda+1)-edge-connect a specified set of vertices in a lambda-edge-connected graphSatoshi Taoka, Toshiya Mashima, Toshimasa Watanabe. 236-239 [doi]
• Allpass structures for multiplierless realization of recursive digital filtersMrinmoy Bhattacharya, Tapio Saramäki. 237-240 [doi]
• Parallel bus systems using code-division multiple access techniqueShinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi. 240-243 [doi]
• Generation of wave digital structures for connection networks containing ideal transformersDietrich Fränken, J. Ochs, Karlheinz Ochs. 240-243 [doi]
• Self-regulated four-phased charge pump with boosted wellsJ. S. Shor, Y. Polansky, Yaen Yaacov Sofer, E. Maayan. 241-244 [doi]
• Design of programmable embedded IF source for design self-testSanghoon Choi, William R. Eisenstadt, Robert M. Fox. 241-244 [doi]
• Joint optimization of error feedback and coordinate transformation for roundoff noise minimization in state-space digital filtersTakao Hinamoto, Hiroaki Ohnishi, Wu-Sheng Lu. 241-244 [doi]
• Insufficiently marked siphon of Petri nets - extension of token-free siphonAtsushi Ohta, Kohkichi Tsuji. 244-247 [doi]
• A 1V fully differential CMOS LNA for 2.4GHz applicationChih-Lung Hsiao, Ro-Min Weng, Kun-Yi Lin. 245-248 [doi]
• IIR equalizer design based on the impulse response symmetry criterionMladen Vucic, Hrvoje Babic. 245-248 [doi]
• Formal verification of LTL formulas for SystemC designsDaniel Große, Rolf Drechsler. 245-248 [doi]
• Convergent transfer subgraph characterization and computationWing Ning Li. 248-251 [doi]
• Multiplierless implementation of bandpass and bandstop recursive digital filters using allpass structuresMrinmoy Bhattacharya, Tapio Saramäki. 249-252 [doi]
• Open computation tree logic with fairnessAnsuman Banerjee, Pallab Dasgupta, Partha Pratim Chakrabarti. 249-252 [doi]
• Efficient bit-serial systolic array for division over GF(2/sup m/)Chang Hoon Kim, Soonhak Kwon, Chun-Pyo Hong, In-Gil Nam. 252-255 [doi]
• High bandwidth transimpedance amplifier design using active transmission linesHyeon-Min Bae, Naresh R. Shanbhag. 253-256 [doi]
• The design of two-channel perfect reconstruction FIR triplet wavelet filter banks using semidefinite programmingK. S. Yeung, S. C. Chan. 253-256 [doi]
• Design and experimental results of a CMOS flip-flop featuring embedded threshold logicMarius Padure, Sorin Cotofana, Stamatis Vassiliadis. 253-256 [doi]
• FPGA realization of an OFDM frame synchronization design for dispersive channelsYin-Tsung Hwang, Kuo-Wei Liao, Chien-Hsing Wu. 256-259 [doi]
• Three-phase high-power-factor rectifier with three AC power switchesBor-Ren Lin, Tsung-Yu Yang, Yung-Chuan Lee. 256-259 [doi]
• Multiplier-less real-valued FFT-like transformation (ML-RFFT) and related real-valued transformationsS. C. Chan, K. M. Tsui. 257-260 [doi]
• Variable sampling window flip-flop for low-power applicationSang-Dae Shin, Hun Choi, Bai-Sun Kong. 257-260 [doi]
• A Differential Difference Comparator for multi-step A/D convertersGang Xu, Jiren Yuan. 257-260 [doi]
• Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAsFrancisco Cardells-Tormo, Javier Valls-Coquillat. 260-263 [doi]
• A simple criterion to judge PFC converter stabilityMohamed Orabi, Tamotsu Ninomiya. 260-263 [doi]
• On unbiased parameter estimation of autoregressive signals observed in noiseWei Xing Zheng. 261-264 [doi]
• Modelling differential pairs for low-distortion amplifier designEnno Karel De Lange, Oscar De Feo, Arie van Staveren. 261-264 [doi]
• Design of MUX, XOR and D-latch SCL gatesMassimo Alioto, Gaetano Palumbo. 261-264 [doi]
• A novel ACS scheme for area-efficient Viterbi decodersYiqun Zhu, Mohammed Benaissa. 264-267 [doi]
• Single-switch flyback power-factor-corrected AC/DC converter with loosely regulated intermediate storage capacitor voltageDylan Dah-Chuan Lu, David Ki-Wai Cheng, Yim-Shu Lee. 264-267 [doi]
• Parameterized and low power DSP core for embedded systemsYa-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-Jye Jou. 265-268 [doi]
• Pairing and ordering to reduce hardware complexity in cascade form filter designHyeong-Ju Kang, In-Cheol Park. 265-268 [doi]
• FPGA designs of parallel high performance GF(2:::233:::) multipliersCornelia Grabbe, Marcus Bednara, Jürgen Teich, Joachim von zur Gathen, Jamshid Shokrollahi. 268-271 [doi]
• Macromodel for short circuit power dissipation of submicron CMOS inverters and its application to design CMOS buffersShrutin Ulman. 269-272 [doi]
• Direct recursive structures for computing radix-r two-dimensional DCTChe-Hong Chen, Bin-Da Liu, Jar-Ferr Yang. 269-272 [doi]
• Providing flexibility in a convolutional encoderMatthias Kamuf, John B. Anderson, Viktor Öwall. 272-275 [doi]
• Inductive interconnect width optimization for low powerMagdy A. El-Moursy, Eby G. Friedman. 273-276 [doi]
• A 1.5 v high-speed class AB operational amplifier for high-resolution high-speed pipelined A/D convertersSaeid Mehrmanesh, Hesam Amir Aslanzadeh, Mohammad B. Vahidfar, Seyed Mojtaba Atarodi. 273-276 [doi]
• A simplified lattice factorization for linear-phase paraunitary filter banks with pairwise mirror image frequency responsesLu Gan, Kai-Kuang Ma. 273-276 [doi]
• A low-power systolic array-based adaptive Viterbi decoder and its FPGA implementationMan Guo, M. Omair Ahmad, M. N. S. Swamy, Chunyan Wang. 276-279 [doi]
• Lossless voltage-clamping of a class E amplifier with a transformer and a diodeTadashi Suetsugu, Marian K. Kazimierczuk. 276-279 [doi]
• On optimizing power and crosstalk for bus coupling capacitance using genetic algorithmsEdwin Naroska, Shanq-Jang Ruan, Feipei Lai, Uwe Schwiegelshohn, Le-Chin Liu. 277-280 [doi]
• A design flow for linear-phase fixed-point FIR filters: from the NPRM specifications to a VHDL codeChia-Yu Yao, Chin-Chih Yeh, Tsuan-Fan Lin, Hsin-Horng Chen, Chiang-Ju Chien. 277-280 [doi]
• 1-V quasi constant-g/sub m/ input/output rail-to-rail CMOS op-ampJuan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín. 277-280 [doi]
• Reverse tracing of forward state metric in Log-Map and MAX-Log-MAP decodersJaeyoung Kwak, Sook Min Park, Kwyro Lee. 280-283 [doi]
• Design and analysis of class DE amplifier with any output Q, any duty ratio and switch on resistanceHiroo Sekiya, Satoki Oshikawa, Jianming Lu, Takashi Yahagi. 280-283 [doi]
• Low power demodulators with phase quantization for a zero-IF Bluetooth receiverSohrab Samadian, Ryoji Hayashi, Asad A. Abidi. 281-284 [doi]
• Low operating voltage and short settling time CMOS charge pump for MEMS applicationsD. S. Hong, Mourad N. El-Gamal. 281-284 [doi]
• Improving the filter bank of a classic speech feature extraction algorithmMark D. Skowronski, John G. Harris. 281-284 [doi]
• Structured design of an integrated subscriber line interface system and circuitArmin Tajalli, Seyed Mojtaba Atarodi. 284-287 [doi]
• The low stress voltage balance charging circuit for series connected batteries based on buck-boost topologyC. Karnjanapiboon, Y. Rungruengphalanggul, Itsda Boonyaroonate. 284-287 [doi]
• A new heuristic signed-power of two term allocation approach for designing of FIR filtersTetsuya Fujie, Rika Ito, Kenji Suyama, Ryuichi Hirabayashi. 285-288 [doi]
• Analysis of output ripple in multi-phase clocked charge pumpsLouie Pylarinos, Khoman Phang. 285-288 [doi]
• A precise temperature-insensitive and linear-in-dB variable gain amplifierSungho Beck, Myung-woon Hwang, Sang-Hoon Lee, Gyu-Hyeong Cho, Jong-Ryul Lee. 285-288 [doi]
• A low power 4.3 GHz phase-locked loop with advanced dual-mode tuning technique including I/Q-signal generation in 0.12µm standard CMOSGeorg Konstanznig, Andreas Springer, R. Weigel. 288-291 [doi]
• Steady-state analysis of PWM DC-to-DC regulatorsLuigi Egiziano, Nicola Femia, Giovanni Spagnuolo, Massimo Vitelli. 288-291 [doi]
• High-dynamic-range decibel-linear IF variable-gain amplifier with temperature compensation for WCDMA applicationsF. Carrara, P. Filoramo, Giovanni Palmisano. 289-292 [doi]
• Reconfigurable implementation of recursive DCT kernels for reduced quantization noiseSüleyman Sirri Demirsoy, Robert Beck, Andrew G. Dempster, Izzet Kale. 289-292 [doi]
• No-race charge recycling complementary pass transistor logic (NCRCPL) for low power applicationsAli Abbasian, S. H. Rasouli, Ali Afzali-Kusha, Mehrdad Nourani. 289-292 [doi]
• A 1.35 GHz CMOS wideband frequency synthesizer for mobile communicationsEsteban Juarez-Hernandez, Alejandro Díaz-Sánchez, E. Tleio-Cuautle. 292-295 [doi]
• Derivation of the Cuk PWM DC-DC converter circuit topologyBrad Bryant, Marian K. Kazimierczuk. 292-295 [doi]
• A low-power low-noise amplifier in 0.35µm SOI CMOS technologyErtan Zencir, Numan Sadi Dogan, Ercument Arvas, Mohammed Ketel. 293-296 [doi]
• A parameterized low power design for the variable-length discrete Fourier transform using dynamic pipeliningJiun-In Guo, Chih-Da Chien, Chien-Chang Lin. 293-296 [doi]
• Design guidelines for reconfigurable multiplier blocksSüleyman Sirri Demirsoy, Andrew G. Dempster, Izzet Kale. 293-296 [doi]
• Boost converter with high voltage gain using a switched capacitor circuitOded Abutbul, Amir Gherlitz, Yefim Berkovich, Adrian Ioinovici. 296-299 [doi]
• A CMOS analog continuous-time FIR filter for 1Gbps cable equalizerXiaofeng Lin, Jin Liu. 296-299 [doi]
• Minimizing switching activity in input word by offset and its low power applications for FIR filtersHojun Kim, Jin-Gyun Chung. 297-300 [doi]
• An efficient interleaved tree-structured almost-perfect reconstruction filterbankNan Li, Behrouz Nowrouzian. 297-300 [doi]
• Interference of ESD protection diodes on RF performance in Giga-Hz RF circuitsMing-Dou Ker, Chien-Ming Lee. 297-300 [doi]
• Mixer topology selection for a 1.8 - 2.5 GHz multi-standard front-end in 0.18µm CMOSVojkan Vidojkovic, Johan van der Tang, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund. 300-303 [doi]
• Design of a step-up/step-down SC DC-DC converter with series-connected capacitorsKei Eguchi, Hongbing Zhu, Fumio Ueno, Toru Tabata. 300-303 [doi]
• A low-complexity correlation algorithmKuang-Fu Cheng, Sau-Gee Chen. 301-304 [doi]
• The integer MDCT and its application in the MPEG layer III audioSoontorn Oraintara, Tharakram Krishnan. 301-304 [doi]
• Algorithm and architecture design for a low-complexity adaptive equalizerChun-Nan Chen, Kuan-Hung Chen, Tzi-Dar Chiueh. 304-307 [doi]
• A design space exploration for integrated switching power convertersGerard Villar, Eduard Alarcón, Francesc Guinjoan, Alberto Poveda. 304-307 [doi]
• A low-power CMOS integrated circuit for bearing estimationPedro Julián, Andreas G. Andreou, Pablo Sergio Mandolesi, David H. Goldberg. 305-308 [doi]
• Application of ACM model to the design of CMOS OTA through a graphical approachH. C. M. Santos, Ana Isabela Araújo Cunha. 305-308 [doi]
• Design and implementation of high-speed arbiter for large scale VOQ crossbar switchesChun Kit Hung, Mounir Hamdi, Chi-Ying Tsui. 308-311 [doi]
• Monolithic distributed power supply for a mixed-signal integrated circuitS. Abedinpour, S. Kiaei. 308-311 [doi]
• Resolution prediction for bandpass-Sigma-Delta-modulators using SIMULINK behavior simulationD. Weiler, T. J. J. van den Boom, Bedrich J. Hosticka. 309-312 [doi]
• Simultaneous task allocation, scheduling and voltage assignment for multiple-processors-core systems using mixed integer nonlinear programmingLap-Fai Leung, Chi-Ying Tsui, Wing-Hung Ki. 309-312 [doi]
• Fast characterization of the noise bounds derived from coefficient and signal quantizationJuan A. López, Carlos Carreras, Gabriel Caffarena, Octavio Nieto-Taladriz. 309-312 [doi]
• A virtually jitter-free fractional-N divider for a Bluetooth radioZhenhua Wang. 312-315 [doi]
• Bifurcation analysis of a power-factor-correction boost converter: uncovering fast-scale instabilityC. K. Michael Tse, Octavian Dranga, Herbert H. C. Iu. 312-315 [doi]
• An ILP-based scheduling scheme for energy efficient high performance datapath synthesisSaraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi. 313-316 [doi]
• N stage non-separable two dimensional wavelet transform for reduction of rounding errorsMasahiro Iwahashi, Munkhbaatar Delgermaa, Koji Ueno, Noriyoshi Kambayashi. 313-316 [doi]
• A symmetric quadrature-less image rejection architecture for RF receiversR. F. Salem, Maged S. Tawfik, H. F. Ragaie. 313-316 [doi]
• Time-delay modelling for multi-layer power systemsIan A. Hiskens. 316-319 [doi]
• Prolonged transposed polynomial-based filters for decimationDjordje Babic, Tapio Saramäki, Markku Renfors. 317-320 [doi]
• A novel hybrid pass logic with static CMOS output drive full-adder cellMingyan Zhang, Jiangmin Gu, Chip-Hong Chang. 317-320 [doi]
• High-speed VLSI architecture for parallel Reed-Solomon decoderHanho Lee. 320-323 [doi]
• Steady state and dynamic security assessment in composite power systemsHyungchul Kim, Chanan Singh. 320-323 [doi]
• Ultra low voltage, low power 4-2 compressor for high speed multiplicationsJiangmin Gu, Chip-Hong Chang. 321-324 [doi]
• Discrete-time modeling of polynomial-based interpolation filters in rational sampling rate conversionDjordje Babic, Vesa Lehtinen, Markku Renfors. 321-324 [doi]
• An evolutionary game approach to energy marketsLeontina Pinto, Jacques Szczupak. 324-327 [doi]
• Design and optimization of CMOS class-E power amplifierZhan Xu, Ezz I. El-Masry. 325-328 [doi]
• Analysis of rational sample rate conversion using image response combiningVesa Lehtinen, Markku Renfors. 325-328 [doi]
• Adaptive digital compensation in DSP based FM modulatorsAnthony G. K. C. Lim, Guo-Qing Wang, Victor Sreeram. 328-331 [doi]
• Estimating loads in distribution feeders using a state estimator algorithm with additional adjustment of transformers loading factorsMauricio Amaral de Almeida, D. B. F. Silveira, M. F. de Medeiros Jr.. 328-331 [doi]
• A 2.4 GHz CMOS image-reject low noise amplifierMing-Chang Sun, Shing Tenqchen, Ying-Haw Shu, Wu-Shiung Feng. 329-332 [doi]
• Optimally weighted local discriminant bases [signal feature extraction/classification]Kamyar Hazaveh, Kaamran Raahemifar. 329-332 [doi]
• Area and power optimization of FPRM function based circuitsYinshui Xia, B. Ali, A. E. A. Almaini. 329-332 [doi]
• Intermittent chaos and subharmonics in switching power suppliesC. K. Michael Tse, Yufei Zhou, Francis Chi-Moon Lau, Shui-Sheng Qiu. 332-335 [doi]
• Reduced order RLS polynomial predistortionMinglu Jin, Sooyoung Kim Shin, Deockgil Oh, Jaemoung Kim. 333-336 [doi]
• A configurable divider using digit recurrenceAnders Berkeman, Viktor Öwall. 333-336 [doi]
• Design of a 4.4 to 5 GHz LNA in 0.25µm SiGe BiCMOS technologyPaolo Crippa, Simone Orcioni, F. Ricciardi, Claudio Turchetti. 333-336 [doi]
• Application of wavelet transform to steady-state approximation of power electronics waveformsLiu Ming, Pik Wan Michelle Ho, Chi K. Michael Tse, Jie Wu. 336-339 [doi]
• Design and simulation of miniaturized communication systems employing symmetrical lossless two-ports constructed with two kinds of elementsB. Siddik Yarman, Ahmet Aksen, Ebru Gürsu Çimen. 336-339 [doi]
• A CMOS infrared optical signal processor for remote controlJoon-Jea Sung, Guen-Soon Kang, Suki Kim. 337-340 [doi]
• A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processorPak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun. 337-340 [doi]
• Wavelet-transform-based strategy for generating new Chinese fontsJiuchao Feng, C. K. Tse, Yuhui Qiu. 337-340 [doi]
• Single-phase ac/ac converter based on half-bridge NPC topologyBor-Ren Lin, Tsung-Yu Yang, T. C. Wei. 340-343 [doi]
• A modelling of ionospheric delay over Chiang Mai provinceS. Suwantragul, P. Rakariyatham, Tharadol Komolmis, Akachai Sang-In. 340-343 [doi]
• A new differential CMOS current pre-amplifier for optical communicationsBendong Sun, Fei Yuan. 341-344 [doi]
• Low power block based FIR filtering coresAhmet T. Erdogan, Tughrul Arslan. 341-344 [doi]
• Local discriminant basis algorithm-a review of theory and applications in signal processingKamyar Hazaveh, Kaamran Raahemifar. 341-344 [doi]
• V:::2::: control of interleaved buck convertersMummadi Veerachary. 344-346 [doi]
• A new multiplierless correlator for timing synchronization in IEEE 802.11a WLANsKun-Wah Yip, Yik-Chung Wu, Tung-Sang Ng. 344-347 [doi]
• Dynamic operand transformation for low-power multiplier-accumulator designMasayoshi Fujino, Vasily G. Moshnyaga. 345-348 [doi]
• Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiersYngvar Berg, Snorre Aunet, Øivind Næss, Johannes Goplen Lomsdalen, Mats Høvin. 345-348 [doi]
• Next cancellation in xDSL systems using variable-length cancellersRajeev C. Nongpiur, Dale J. Shpak, Andreas Antoniou. 345-348 [doi]
• Modeling of cascade buck convertersMummadi Veerachary. 347-350 [doi]
• A wide-band current-mode OTA-based analog multiplier-dividerKhanittha Kaewdang, Chalermpan Fongsamut, Wanlop Surakampontorn. 349-352 [doi]
• Voltage scaling and repeater insertion for high-throughput low-power interconnectsVinita V. Deodhar, Jeffrey A. Davis. 349-352 [doi]
• Norm and coefficient constraints for robust adaptive beamformingQiyue Zou, Zhu Liang Yu, Zhiping Lin. 349-352 [doi]
• Robust pole location for a DC-DC converter through parameter dependent controlVinicius Foletto Montagner, Pedro Luis Dias Peres. 351-354 [doi]
• Cooperative bit-loading and fairness bandwidth allocation in ADSL systemsNikolaos Papandreou, Theodore Antonakopoulos. 352-355 [doi]
• Integrated active noise control communication headsetsWoon S. Gan, Sen M. Kuo. 353-356 [doi]
• A triple port RAM based low power commutator architecture for a pipelined FFT processorM. Hasan, Tughrul Arslan. 353-356 [doi]
• A low-voltage compatible two-stage amplifier with /spl ges/120 dB gain in standard digital CMOSChengming He, Degang Chen, Randall L. Geiger. 353-356 [doi]
• High-efficiency electronic transformer for low-voltage halogen lampKamon Jirasereeamornkul, Itsda Boonyaroonate, Kosin Chamnongthai. 355-358 [doi]
• A continuous tracking algorithm for long-term memory motion estimationC. J. Duanmu, M. Omair Ahmad, M. N. S. Swamy. 356-359 [doi]
• DSP engine for ultra-low-power audio applicationsRichard C. S. Morling, Izzet Kale, S. J. Morris, F. Custode. 357-360 [doi]
• Minimum selection GSC and adaptive low-power rake combining schemeSuk Won Kim, Dong Sam Ha, Jeffrey H. Reed. 357-360 [doi]
• A fully-integrated self-tuned transformer based step-up converterAlessandro Savio, Anna Richelli, Luigi Colalongo, Zsolt Miklós Kovács-Vajna. 357-360 [doi]
• Push-pull dc/ac inverter for large electroluminescent lampS. Bumrungkeeree, Itsda Boonyaroonate. 359-362 [doi]
• Adaptive IIR notch filter with controlled bandwidth for narrow-band interference suppression in DS CDMA systemAloys Mvuma, Shotaro Nishimura, Takao Hinamoto. 361-364 [doi]
• An asynchronous pipeline comparisons with application to DCT matrix-vector multiplicationSunan Tugsinavisut, Suwicha Jirayucharoensak, Peter A. Beerel. 361-364 [doi]
• Effects of resistive loading on unity gain frequency of two-stage CMOS operational amplifiersU. Dasgupta, Yong Ping Xu. 361-364 [doi]
• Allocating usages of voltage security margin in deregulated electric marketsGarng M. Huang, Nirmal-Kumar C. Nair. 363-366 [doi]
• FGS-based video streaming test-bed for MPEG 21 universal multimedia access with digital item adaptationChung-Neng Wang, Chia-Yang Tsai, Hsiao-Chiang Chuang, Yao-Chung Lin, Jin-He Chen, Kin Lam Tong, Feng-Cheng Chang, Chun-Jen Tsai, Shuh-Ying Lee, Tihao Chiang, Hsueh-Ming Hang. 364-367 [doi]
• A finite precision LMS algorithm for increased quantization robustnessFredric Lindström, Mattias Dahl, Ingvar Claesson. 365-368 [doi]
• A multi-phase charge-sharing technique without external capacitor for low-power TFT-LCD column driversShao-Sheng Yang, Pao-Lin Guo, Tsin-Yuan Chang, Jin-Hua Hong. 365-368 [doi]
• Cascode transconductance amplifiers for HF switched-capacitor applicationsJozef Adut, José Silva-Martínez. 365-368 [doi]
• Oscillation mode analysis in power systems based on data acquired by distributed phasor measurement unitsT. Hashiguchi, M. Yoshimoto, Y. Mitani, O. Saeki, K. Tsuji. 367-370 [doi]
• Content based error detection and concealment for image transmission over wireless channelShuiming Ye, Xinggang Lin, Qibin Sun. 368-371 [doi]
• A new LMS-based Fourier analyzer in the presence of frequency mismatchYegui Xiao, Rabab Kreidieh Ward, Li Xu. 369-372 [doi]
• An active leakage-injection scheme applied to low-voltage SRAMsJader A. De Lima. 369-372 [doi]
• Dynamic bit-rate reduction based on frame-skipping and requantization for MPEG-1 to MPEG-4 transcoderKwang-deok Seo, Soon-kak Kwon, Sug Ky Hong, Jae-kyoon Kim. 372-375 [doi]
• Transform domain approximate QR-LS adaptive filtering algorithmYang Xin-xing, S. C. Chan. 373-376 [doi]
• Low-power and low-voltage fully parallel content-addressable memoryChi-Sheng Lin, Kuan-Hua Chen, Bin-Da Liu. 373-376 [doi]
• A 900 mV 25µW high PSRR CMOS voltage reference dedicated to implantable micro-devicesYamu Hu, Mohumud Sowan. 373-376 [doi]
• Integrated vision sensor for detecting boundary crossingsS. Zahnd, Patrick Lichtsteiner, Tobi Delbrück. 376-379 [doi]
• Increasing the immunity to electromagnetic interferences in a bandgap voltage referenceA. Pretelli, Anna Richelli, Luigi Colalongo, Zsolt Miklós Kovács-Vajna. 377-380 [doi]
• A low power charge sharing ROM using dummy bit linesByung-Do Yang, Lee-Sup Kim. 377-380 [doi]
• An HVDC-based controller design for stabilization of frequency oscillationSanchai Dechanupaprittha, A. Patanapakdee, Issarachai Ngamroo. 379-382 [doi]
• Multiple single pixel dim target detection in infrared image sequenceMukesh A. Zaveri, Shabbir N. Merchant, Uday B. Desai. 380-383 [doi]
• A 1-volt, high PSRR, CMOS bandgap voltage referenceSaeid Mehrmanesh, Mohammad B. Vahidfar, Hesam Amir Aslanzadeh, Seyed Mojtaba Atarodi. 381-384 [doi]
• RAMP: an adaptive filter with links to matching pursuits and iterative linear equation solversJohn Håkon Husøy. 381-384 [doi]
• Automatic face color segmentation based rate control for low bit-rate video codingDatchakorn Tancharoen, Hatairat Kortrakulkij, S. Khemachai, Supavadee Aramvith, Somchai Jitapunkul. 384-387 [doi]
• New CMOS balanced output transconductor and application to GM-C biquad filterSoliman A. Mahmoud, Inas A. Awad. 385-388 [doi]
• Increasing the locality of memory access patterns by low-overhead hardware address relocationAlberto Macii, Enrico Macii, Massimo Poncino. 385-388 [doi]
• Extended RLS lattice adaptive filtersRicardo Merched. 385-388 [doi]
• Electrical protection selectivity in auxiliary DC installations in power plants and substationsSrdjan Skok, Ante Marusic, Sejid Tesnjak. 387-390 [doi]
• Multiplierless predictor for DPCM of imagesR. Thamvichai, Tamal Bose, Milena Radenkovic. 388-391 [doi]
• On use of averaging in FxLMS algorithm for single-channel feedforward ANC systemsMuhammad Tahir Akhtar, Masahide Abe, Masayuki Kawamata. 389-392 [doi]
• One class of transfer functions with monotonic step responseIgor M. Filanovsky. 389-392 [doi]
• A semi-Gray encoding algorithm for low-power state assignmentChunhong Chen, Jiang Zhao, Majid Ahmadi. 389-392 [doi]
• Subband decomposition oriented multirate electrical power network digital simulationJacques Szczupak, Silvana Terezinha Faceroli, K. G. C. da Silva. 391-394 [doi]
• An enhanced hexagonal search algorithm for block motion estimationCe Zhu, Xiao Lin, Lap-Pui Chau. 392-395 [doi]
• Analog implementation of MOS-translinear Morlet WaveletsCarlos Sánchez-López, Alejandro Díaz-Sánchez, Esteban Tlelo-Cuautle. 393-396 [doi]
• Hardware implementation of evolutionary digital filtersMasahide Abe, Masayuki Kawamata. 393-396 [doi]
• A power efficient register file architecture using master latch sharingMarek Wróblewski, Matthias Müller, Andreas Wortmann, Sven Simon, Wilhelm Pieper, Josef A. Nossek. 393-396 [doi]
• Examining characteristics of an observability formulation for nonlinear power systemsChris J. Dafis, Chika Nwankpa. 395-398 [doi]
• Adaptive vector median filter for removal impulses from color imagesManglem Singh, Prabin Kumar Bora. 396-399 [doi]
• Turbo coded multiple symbol differential detection for correlated Rayleigh fading channelPisit Vanichchanunt, Chantima Sritiapetch, Suvit Nakpeerayuth, Lunchakorn Wuttisittikulkij. 397-400 [doi]
• A fully differential low-voltage CMOS high-speed track-and-hold circuitTsung-Sum Lee, Chi-Chang Lu. 397-400 [doi]
• Optimum word length allocation for multipliers of integer DCTMasahiro Iwahashi, Osamu Nishida, Somchart Chokchaitam, Noriyoshi Kambayashi. 400-403 [doi]
• An SOI 4 transistors self-refresh ultra-low-voltage memory cellOlivier Thomas, Amara Amara. 401-404 [doi]
• Adaptivity figures of merit and K-rail diagrams - comprehensive performance characterization of low-noise amplifiers and voltage-controlled oscillatorsAleksandar Tasic, Wouter A. Serdijn, John R. Long. 401-404 [doi]
• A study on the step size of cascaded adaptive notch filter utilizing allpass filterY. Kinugasa, Y. Itoh, Masaki Kobayashi, Y. Fukui, J. Okello. 401-404 [doi]
• Conjectural variation based learning of generator s behavior in electricity marketYiqun Song, Zhijian Hou, Fushuan Wen, Yixin Ni, Felix F. Wu. 403-406 [doi]
• A novel algorithm for color quantization by 3D diffusionK. C. Lo, Y.-H. Chan, M. P. Yu. 404-407 [doi]
• A CMOS current-mode squarer/rectifier circuitBoonchai Boonchu, Wanlop Surakampontorn. 405-408 [doi]
• Polyphase IIR filter banks for subband adaptive echo cancellation applicationsArtur Krukowski, Izzet Kale. 405-408 [doi]
• High performance and low power completion detection circuitHing Mo Lam, Chi-Ying Tsui. 405-408 [doi]
• A heuristic approach for power system measurement placement designGarng M. Huang, Jiansheng Lei, Ali Abur. 407-410 [doi]
• New partition-based filters for suppressing mixed high probability impulse and Gaussian noises in imagesNoritaka Yamashita, Hiroo Sekiya, Jianming Lu, Takashi Yahagi. 408-411 [doi]
• A new algorithm for howling detection [acoustic feedback howling]Jianqiang Wei, Limin Du, Zhe Chen, Fuliang Yin. 409-411 [doi]
• Broad-band transimpedance amplifier for multigigabit-per-second (40 Gbps) optical communication systems in 0.135µm PHEMT technologyMiguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas, M. Gloanec, E. Leclerc, Bernard Lefebvre. 409-412 [doi]
• Low-power CMOS circuit techniques for motion estimatorsToshifumi Enomoto, Tomohito Ei. 409-412 [doi]
• Fast control grid point estimation for mesh based motion estimationKai Fung Tsang, Oscar C. Au. 412-415 [doi]
• Integrated near-end acoustic echo and noise reduction systemsSen M. Kuo, D. W. Sun, Woon S. Gan. 412-415 [doi]
• A new non-iterative, adaptive baseband predistortion method for high power rf amplifiersNikos Naskas, Yannis Papananos. 413-416 [doi]
• Power-delay tradeoffs in residue number systemAlberto Nannarelli, Gian-Carlo Cardarilli, Marco Re. 413-416 [doi]
• Analytical computation of multipath components in the indoor power gridDespina Anastasiadou, Theodore Antonakopoulos. 415-418 [doi]
• ROI-based scalability for progressive transmission in JPEG2000 codingOsamu Watanabe, Hitoshi Kiya. 416-419 [doi]
• Simplified structures for two-dimensional adaptive notch filtersSoo-Chang Pei, Chang-Long Wu, Jian-Jiun Ding. 416-419 [doi]
• A 22-mW 435 MHz silicon on insulator CMOS high-gain LNA for subsampling receiversT.-H. Huang, Ertan Zencir, M. R. Yuce, Numan Sadi Dogan, Wentai Liu, Ercument Arvas. 417-420 [doi]
• Upper and lower bounds on FSM switching activityEleftheria Athanasopoulou, Christoforos N. Hadjicostis. 417-420 [doi]
• A power divider using linear electric probes coupling inside conducting cylindrical cavitySanya Amnartpluk, Chuwong Phongcharoenpanich, Sompol Kosulvit, Monai Krairiksh. 419-422 [doi]
• Input balanced state-space realization based adaptive recursive filtersJ. Zhou, G. Li. 420-423 [doi]
• An ROI image coding based on switching wavelet transformShinji Fukuma, Shigeru Ikuta, M. Ito, S. Nishimura, Masahiko Nawate. 420-423 [doi]
• Exploiting reconfigurability for low-power control of embedded processorsLuigi Carro, Edgard de Faria Corrêa, R. Cardozo, Fernando Moraes, Sergio Bampi. 421-424 [doi]
• Concept of transformer-feedback degeneration of low-noise amplifiersAleksandar Tasic, Wouter A. Serdijn, John R. Long. 421-424 [doi]
• Robust recursive bi-iteration singular value decomposition (SVD) for subspace tracking and adaptive filteringYu Wen, Shing-Chow Chan, Ka-Leung Ho. 424-427 [doi]
• Adaptive directional zerotree image codingSuksan Jirachawang, Vutipong Areekul. 424-427 [doi]
• A dual-pulse-clock double edge triggered flip-flop for low voltage and high speed applicationKuo-Hsing Cheng, Yung-Hsiang Lin. 425-428 [doi]
• A high compliance CMOS current source for low voltage applicationsMichele Quarantelli, Marco Poles, Marco Pasotti, Pier Luigi Rolandi. 425-428 [doi]
• Random noise in switching DC-DC converter: verification and analysisAnawach Sangswang, Chika Nwankpa. 427-430 [doi]
• Cascaded-parallel adaptive notch filter based on orthogonal decompositionY. Liu, Paulo S. R. Diniz, Timo I. Laakso. 428-431 [doi]
• An efficient wavelet-VQ method for image codingMomotaz Begum, Nurun Nahar, Kaneez Fatimah, Kamrul Hasan. 428-431 [doi]
• Design of accurate analog circuits for low voltage low power CMOS systemsChristian Falconi, Arnaldo D Amico, Marco Faccio. 429-432 [doi]
• MTCMOS with outer feedback (MTOF) flip-flopsMircea R. Stan, Marco Barcella. 429-432 [doi]
• On pre-whitened sign algorithmsSofia Ben Jebara, Hichem Besbes. 432-435 [doi]
• Error protection for JPEG2000 encoded images and its evaluation over OFDM channelKhairul Munadi, Masayuki Kurosaki, Kiyoshi Nishikawa, Hitoshi Kiya. 432-435 [doi]
• Comparison of synthesized bus and crossbar interconnection architecturesVesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen. 433-436 [doi]
• A high speed low input current low voltage CMOS current comparatorK. Moolpho, Jitkasem Ngarmnil, S. Sitjongsataporn. 433-436 [doi]
• Transformerless DC-DC converters with a very high DC line-to-load voltage ratioBoris Axelrod, Yefim Berkovich, Adrian Ioinovici. 435-438 [doi]
• A post-processing method for vector quantization to achieve higher PSNR and nearly constant bit rateZhibin Pan, Koji Kotani, Tadahiro Ohmi. 436-439 [doi]
• A digitally controlled PLL for digital SOCsThomas Olsson, Peter Nilsson. 437-440 [doi]
• SiGe HBT power amplifier for IS-95 CDMA using a novel process, voltage, and temperature insensitive biasing schemeN. Srirattana, Muhammad S. Qureshi, A. Aude, V. Krishnamurthy, Deuk Hyoun Heo, Phillip E. Allen, Joy Laskar. 437-440 [doi]
• Use of state trajectory prediction in hysteresis control for achieving fast transient response of the buck converterKelvin Ka Sing Leung, Henry Shu-Hung Chung, Ron Shu-Yuen Hui. 439-442 [doi]
• Estimation of transmission line parameters by adaptive inverse scatteringA. Yonemoto, Takashi Hisakado, Kohshi Okumura. 440-443 [doi]
• Spatial varying filtering for color filter array interpolation in digital still camerasO. C. Oscar, Ming Sun Fu. 440-443 [doi]
• Novel sub-1V CMOS domino dynamic logic circuit using a direct bootstrap (DB) technique for low-voltage CMOS VLSIP. C. Chen, James B. Kuo. 441-444 [doi]
• Large-signal S-parameters CAD technique applied to power amplifier designEric Kerherve, M. Hazouard, L. Courcelle, P. Jarry. 441-444 [doi]
• Feasibility study of on-chip class E DC-DC converterTadashi Suetsugu, Shogo Kiryu, Marian K. Kazimierczuk. 443-446 [doi]
• Scalable giga-pixels/s binary image morphological operationsSongpol Ongwattanakul, Phaisit Chewputtanagul, David Jeff Jackson, Kenneth G. Ricks. 444-447 [doi]
• A least-squares based algorithm for FIR filtering with noisy dataWei Xing Zheng. 444-447 [doi]
• A low power delayed-clocks generation and distribution systemSu Kio, Kian Haur Chong, Carl Sechen. 445-448 [doi]
• Lumped element based Doherty power amplifier topology in CMOS processC. Tongchoi, Mitchai Chongcheawchamnan, Apisak Worapishet. 445-448 [doi]
• Single-inductor dual-input dual-output switching converter for integrated battery charging and power regulationYat-Hei Lam, Wing-Hung Ki, Chi-Ying Tsui, Philip K. T. Mok. 447-450 [doi]
• A space-time decorrelating rake receiver for DS-CDMA communications over fast fading channelsCheong Yiu Fung, S. C. Chan, K. W. Tse. 448-451 [doi]
• FPGA implementation of block truncation coding algorithm for gray scale imagesSherif M. Saif, Hazem M. Abbas, Salwa M. Nassar. 448-451 [doi]
• Clock recovery in high-speed multilevel serial linksFaisal A. Musa, Anthony Chan Carusone. 449-452 [doi]
• Optimized design of MOS capacitors in standard CMOS technology and evaluation of their Equivalent Series Resistance for power applicationsGerard Villar, Eduard Alarcón, Francesc Guinjoan, Alberto Poveda. 451-454 [doi]
• FPGA implementation of a frequency adaptive learning SOFM for digital color still imagingShibu Menon, Chip-Hong Chang, Rui Xiao. 452-455 [doi]
• Realization of the NLMS based transversal adaptive filter using block floating point arithmeticA. Mitra, M. Chakraborty. 452-455 [doi]
• Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexityTuran Demirci, Ilhan Hatirnaz, Yusuf Leblebici. 453-456 [doi]
• Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear active filtersYorgos Palaskas, Yannis P. Tsividis. 453-456 [doi]
• CMOS current-mode analog circuit building blocks for rf DC-DC converter controllersJames Masciotti, Lessing Luu, Dariusz Czarkowski. 455-458 [doi]
• Unsupervised image segmentation using local homogeneity analysisFeng Jing, Mingjing Li, HongJiang Zhang, Bo Zhang. 456-459 [doi]
• Convergence analysis of a CORDIC-based gradient adaptive lattice filterShin ichi Shiraishi, Miki Haseyama, Hideo Kitajima. 456-459 [doi]
• 3.3-V baseband Gm-C filters for wireless transceiver applicationsJaeyoung Shin, Sunki Min, Soosun Kim, Joongho Choi, Soohyoung Lee, Hojin Park, Jaewhui Kim. 457-460 [doi]
• Simulated evolution algorithm for multiobjective VLSI netlist bi-partitioningSadiq M. Sait, Aiman H. El-Maleh, Rush H. Al-Abuji. 457-460 [doi]
• Recent trends in fuzzy control of electrical drives: an industry point of viewLuigi Fortuna, M. Lo Presti, C. Vinci, A. Cucuccio. 459-461 [doi]
• Multiple contour segmentation with automatic thresholdingY. B. Chen, Oscal T.-C. Chen. 460-463 [doi]
• On the improvement of blind MOE detector via a posteriori adaptation and adaptive step-sizeSamphan Pampichai, Phaophak Sirisuk. 460-463 [doi]
• Plic-Plac: a novel constructive algorithm for placementRenato Fernandes Hentschke, Ricardo Reis. 461-464 [doi]
• Analytical synthesis of voltage mode OTA-C all-pass filters for high frequency operationChun-Ming Chang, Bashir M. Al-Hashimi. 461-464 [doi]
• Design and realisation of a nano-inductance for integrated power convertersBruno Estibals, Corinne Alonso, Franck Carcenac, Alain Salles, Laurent Malaquin, Christophe Vieu. 462-465 [doi]
• A high-speed blind DFE equalizer using an error feedback filter for QAM modemsJung Hoo Lee, Weon Heum Park, Ju Hyung Hong, Myung Hoon Sunwoo, Kyung Ho Kim. 464-467 [doi]
• A Bayesian skin/non-skin color classifier using non-parametric density estimationDouglas Chai, Son Lam Phung, Abdesselam Bouzerdoum. 464-467 [doi]
• Graph-based approach to evaluate net routability of a floorplanNiwat Waropus, Rajendar Koltur, Malgorzata Chrzanowska-Jeske. 465-468 [doi]
• A new resistorless electronically tunable voltage-mode first-order phase equalizerShahram Minaei, Oguzhan Cicekoglu. 465-468 [doi]
• Vehicle image classification via expectation-maximization algorithmSuree Pumrin, Daniel J. Dailey. 468-471 [doi]
• Stability, controllability and observability of 2-D continuous-discrete systemsYang Xiao. 468-471 [doi]
• CSD multipliers for FPGA DSP applicationsMichael A. Soderstrand. 469-472 [doi]
• A recurrent neural network for nonlinear convex programmingYoushen Xia, Jun Wang. 470-473 [doi]
• Roundoff noise minimization in two-dimensional state-space digital filters using error feedbackTakao Hinamoto, Keisuke Higashi, Wu-Sheng Lu. 472-475 [doi]
• A low bit-rate hybrid DWT-SVD image-coding system (HDWTSVD) for monochromatic imagesH. Ochoa, K. R. Rao. 472-475 [doi]
• Electrical characteristics of multi-layer power distribution gridsAndrey V. Mezhiba, Eby G. Friedman. 473-476 [doi]
• Novel integratable notch filter implementation for 100 dB image rejectionDeepa S. Parthasarathy, Ramesh Harjani. 473-476 [doi]
• Recurrent neural networks: overview and perspectivesAnthony N. Michel. 474-477 [doi]
• A 4D frequency-planar IIR filter and its application to light field processingDonald F. Dansereau, Leonard T. Bruton. 476-479 [doi]
• Fast codeword search algorithm for ECVQ using hyperplane decision ruleKousuke Imamura, Ahmed Swilem, Hideo Hashimoto. 476-479 [doi]
• Accurate rise time and overshoots estimation in RLC interconnectsNoha H. Mahmoud, Yehea I. Ismail. 477-480 [doi]
• Tunable analog loudspeaker crossover networkEduardo Rapoport, Fernando Antonio Pinto Baruqui, Antonio Petraglia. 477-480 [doi]
• On global stability of Hopfield neural networks with discontinuous neuron activationsMauro Forti, Paolo Nistri. 478-481 [doi]
• An effieient algorithm for fractal image coding using kick-out and zero contrast conditionsCheung-Ming Lai, Kin-Man Lam, Wan-Chi Siu. 480-483 [doi]
• Realization of high accuracy 2-D variable IIR digital filters based on the reduced-dimensional decomposition formHyuk-Jae Jang, Masayuki Kawamata. 480-483 [doi]
• A 1V 0.54µW fourth order switched capacitor filter with switched opamp technique for cardiac pacemaker sensing channelJen-Shiun Chiang, Hsueh-Ping Chen, Cheng-ming Ying. 481-484 [doi]
• Three-layer bidirectional asymmetrical associative memoryH. K. Kwan. 482-485 [doi]
• A new recursive formulation for 2-D WHTAyman Elnaggar, Mokhtar Aboelaze. 484-487 [doi]
• TCP-friendly assured forwarding (AF) video service in DiffServ networksYoung-Gook Kim, C. C. Jay Kuo. 484-487 [doi]
• A crosstalk aware two-pin net routerMing-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen. 485-488 [doi]
• Modeling of diffusion process in p-n junction diode using matrix rational approximationYuichi Tanji. 486-489 [doi]
• A GA-based routing method with an upper bound constraintJun Inagaki, Miki Haseyama, Hideo Kitajima. 488-491 [doi]
• Parallel iterations for recursive median filterAdrian Burian, Jarmo Takala, Marina Dana Topa. 488-491 [doi]
• Placement with symmetry constraints for analog layout using red-black treesSarat C. Maruvada, Karthik Krishnamoorthy, Subodh Annojvala, Florin Balasa. 489-492 [doi]
• A low-power CMOS complex filter for Bluetooth with frequency tuningAhmed Emira, Edgar Sánchez-Sinencio. 489-492 [doi]
• A reduction technique of large scale RCG interconnects in complex frequency domainYoshihiro Yamagami, Yoshifumi Nishio, Atsumi Hattori, Akio Ushida. 490-493 [doi]
• A cost-effective 2-D discrete cosine transform processor with reconfigurable datapathYeong-Kang Lai, Han-Jen Hsu. 492-495 [doi]
• An implementation of numerical inversion of Laplace transforms on FPGAA. Yonemoto, Takashi Hisakado, Kohshi Okumura. 492-495 [doi]
• Arbitrary convex and concave rectilinear block packing based on corner block listYuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Song Chen, Chung-Kuan Cheng, Jun Gu. 493-496 [doi]
• 0.18µ CMOS Gm-C digitally tuned filter for telecom receiversStefano D Amico, Andrea Baschirotto. 493-496 [doi]
• Realizable reduction of RLC circuits using node eliminationMasud H. Chowdhury, Chirayu S. Amin, Yehea I. Ismail, Chandramouli V. Kashyap, Byron Krauter. 494-497 [doi]
• An efficient binary motion estimation algorithm and its architecture for MPEG-4 shape codingTsung-Han Tsai, Chia-Pin Chen. 496-499 [doi]
• A new memory reference reduction method for FFT implementation on DSPYiyan Tang, Lie Qian, Yuke Wang, Yvon Savaria. 496-499 [doi]
• General iterative heuristics for VLSI multiobjective partitioningSadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Abaji. 497-500 [doi]
• A 0.7µm CMOS anti-aliasing filter for non-oversampled video signal applicationsP. Sirinamaratana, N. Wongkomet. 497-500 [doi]
• Analysis of PCB interconnects using electromagnetic reduction techniqueTakayuki Watanabe, Hideki Asai. 498-501 [doi]
• Real-time acquisition and tracking for GPS receiversAbdulqadir Alaqeeli, Janusz A. Starzyk, Frank van Graas. 500-503 [doi]
• A new linear predictor employing vector quantization in nonorthogonal domains for high quality speech codingWasfy B. Mikhael, V. Krishnan. 500-503 [doi]
• Tile-graph-based power planningJyh Perng Fang, Sao-Jie Chen. 501-504 [doi]
• A compact biquadratic g/sub m/-C filter structure for low-voltage and high frequency applicationsArmin Tajalli, Seyed Mojtaba Atarodi. 501-504 [doi]
• Passive macromodeling of subnetworks characterized by measured dataDharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla. 502-505 [doi]
• Disk I/O mixed scheduling strategy for VoD serversHai Jin, Jie Xu, Bibo Tu, Shengli Li. 504-507 [doi]
• High performance asynchronous bus for SoCEun-Gu Jung, Byung-Soo Choi, Dong-Ik Lee. 505-508 [doi]
• On the invariance of the second-order modes of continuous-time systems under general frequency transformation [analog filters]Masayuki Kawamata. 505-508 [doi]
• A 32×32 cellular test chip targeting new functionalitiesAri Paasio, Mika Laiho, Asko Kananen, Kari Halonen, Jonne Poikonen. 506-509 [doi]
• A comparison of algorithms for sound localizationPedro Julián, Andreas G. Andreou, Laurence Riddle, Shihab Shamma, Gert Cauwenberghs. 508-511 [doi]
• Minimizing coupling jitter by buffer resizing for coupled clock networksMing-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen. 509-512 [doi]
• Properties of analog systems with varying parameters [averaging/low-pass filters]Roman Kaszynski. 509-512 [doi]
• A CNN-based chip for robot locomotion controlPaolo Arena, Salvatore Castorina, Luigi Fortuna, Mattia Frasca, Marc Ruta. 510-513 [doi]
• Moduli selection in RNS for efficient VLSI implementationWei Wang 0003, M. N. S. Swamy, M. Omair Ahmad. 512-515 [doi]
• A hardware-like high-level language based environment for 3D graphics architecture explorationInho Lee, Joung-Youn Kim, Yeon-Ho Im, Yunseok Choi, Hyunchul Shin, Chang-Young Han, Donghyun Kim, Hyoungjoon Park, Young-Il Seo, Kyusik Chung, Chang-Hyo Yu, Kanghyup Chun, Lee-Sup Kim. 512-515 [doi]
• Statistical modeling of gate-delay variation with consideration of intra-gate variabilityKen-ichi Okada, Kento Yamaoka, Hidetoshi Onodera. 513-516 [doi]
• On-chip template training for pattern matching by cellular neural network universal machines (CNN-UM)R. Schonmeyer, Dirk Feiden, Ronald Tetzlaff. 514-517 [doi]
• Nonuniform sampling driver design for optimal ADC utilizationFrank Papenfuss, Yuri Artyukh, E. Boole, Dirk Timmermann. 516-519 [doi]
• Limits in FIR subband beamforming for spatially spread near-field speech sourcesNedelko Grbic, Sven Nordholm, Antonio Cantoni. 516-519 [doi]
• CMOS transconductor design for VHF filtering applicationsLuo Zhenying, Li Ming Fu, Yong Lian, S. C. Rustagi. 517-520 [doi]
• Vision systems based on the 128×128 focal plane cellular visual microprocessor chipsÁkos Zarándy, Csaba Rekeczky, István Szatmári. 518-521 [doi]
• Interactive interface of realtime 3D sound movement for embedded applicationsS. Komata, A. Pal, Noriaki Sakamoto, Wataru Kobayashi, Takao Onoye, Isao Shirakawa. 520-523 [doi]
• Configurable two-dimensional linear feedback shifter registers for deterministic and random patterns [logic BIST]Chien-In Henry Chen, Kiran George. 521-524 [doi]
• Design considerations for a 1.5-V, 10.7-MHz bandpass gm-C filter in a 0.6µm standard CMOS technologyArmin Tajalli, Seyed Mojtaba Atarodi. 521-524 [doi]
• Conflict-free parallel memory access scheme for FFT processorsJarmo Takala, Tuomas Järvinen, Harri Sorokin. 524-527 [doi]
• Automatic moving object extraction in MPEG videoWei Zeng, Wen Gao, Debin Zhao. 524-527 [doi]
• Performance comparison of Tow-Thomas biquad filters based on VOAs and CFOAsRosario Mita, Gaetano Palumbo, Salvatore Pennisi. 525-528 [doi]
• A particle detector fully-programmable interface circuit for satellite applicationsFausto Borghetti, M. Gobbi, Andrea Fornasari, Piero Malcovati, Franco Maloberti, M. Pagano. 526-529 [doi]
• Recursive block-matching principle for error concealment algorithmMei-Juan Chen, Che-Shing Chen, Ming-Chieh Chi. 528-531 [doi]
• The design of an active band pass filter using uniformly distributed RC lineP. Tangtisanon, A. Khempila, N. Panyanouvong, S. Saetia, K. Janchitrapongvej, S. Sudo, M. Teramoto. 529-532 [doi]
• Aliasing probability calculations in nonlinear compactorsChristoforos N. Hadjicostis. 529-532 [doi]
• Electrostatical coupling-spring for micro-mechanical filtering applicationsDimitri Galayko, Andreas Kaiser, Lionel Buchaillot, Dominique Collard, Chantal Combi. 530-533 [doi]
• Dual clock rate block data parallel architectureAn-Te Deng, Winser E. Alexander. 532-535 [doi]
• A new error resilient coding scheme for JPEG image transmission based on data embedding and vector quantizationLi-Wei Kang, Jin-Jang Leou. 532-535 [doi]
• Novel high performance single amplifier biquads [voltage mode filters]Brent Maundy, Ezz I. El-Masry, Peter B. Aronhime. 533-536 [doi]
• Resource adaptation based on MPEG-21 usage environment descriptionsHuifang Sun, Anthony Vetro, K. Asai. 536-539 [doi]
• New efficient residue-to-binary converters for 4-moduli set {2/sup n/ - 1, 2/sup n/, 2/sup n/ + 1, 2/sup n+1/ - 1}Bin Cao, Chip-Hong Chang, Thambipillai Srikanthan. 536-539 [doi]
• Experimental evaluation and validation of a BIST algorithm for characterization of A/D converter performanceKumar L. Parthasarathy, Le Jin, Turker Kuyel, Dana Price, Degang Chen, Randall L. Geiger. 537-540 [doi]
• RC polyphase filter with flat gain characteristicKazuyuki Wada, Yoshiaki Tadokoro. 537-540 [doi]
• Design considerations for an automotive sensor interface Sigma-Delta modulatorF. Medeiro, José Manuel de la Rosa Utrera, Rocio del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez. 538-541 [doi]
• A parallel/pipelined algorithm for the computation of MDCT and IMDCTN. Rama Murthy, M. N. S. Swamy. 540-543 [doi]
• Channel compensation of modulation spectral featuresSomsak Sukittanon, Les E. Atlas. 540-543 [doi]
• Realization of electronically tunable ladder filters using multi-output current controlled conveyorsAmorn Jiraseree-amornkun, Nobuo Fujii, Wanlop Surakampontorn. 541-544 [doi]
• Systematic test program generation for SoC testing using embedded processorMohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha. 541-544 [doi]
• Two microphones speech enhancement system based on a double affine projection algorithmM. Gabrea. 544-547 [doi]
• Architecture for CORDIC algorithm realization without ROM lookup tablesChuen-Yau Chen, Wen-Chih Liu. 544-547 [doi]
• On efficient extraction of partially specified test sets for synchronous sequential circuitsAiman H. El-Maleh, Khaled Al-Utaibi. 545-548 [doi]
• Log-domain complex filter design with XFILTERMykhaylo A. Teplechuk, John I. Sewell. 545-548 [doi]
• Design of sinusoid-based variable fractional delay FIR filter using weighted least squares methodChien-Cheng Tseng. 546-549 [doi]
• Relationship between Haar wavelet and Reed-Muller spectraBogdan J. Falkowski. 548-551 [doi]
• Two-channel microphone array processing for speech enhancementZhaoli Yan, Limin Du, Jianqiang Wei, Hui Zeng. 548-551 [doi]
• Combinational circuit fault diagnosis using logic emulationShyue-Kung Lu, Jian-Long Chen, Cheng-Wen Wu, Ken-Feng Chang, Shi-Yu Huang. 549-552 [doi]
• Comparison of currents in differential log-domain filters with common-mode feedbackH. J. Ko, Robert M. Fox. 549-552 [doi]
• Vector-array decomposition-based design of variable digital filtersTian-Bo Deng. 550-553 [doi]
• Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoderTsung-Han Tsai, Shih-Way Huang, Liang-Gee Chen. 552-555 [doi]
• Improvements on layout of garment patterns for efficient fabric consumptionSophon Vorasitchai, Suthep Madarasmi. 552-555 [doi]
• Fully-differential log-domain integrator with orthogonal common-mode and differential-mode responsesJirayuth Mahattanakul, Sitthichai Pookaiyaudom. 553-556 [doi]
• Linear programming design of linear-phase FIR filters with variable bandwidthPer Löwenborg, Håkan Johansson. 554-557 [doi]
• Properties of fastest LIA transform matrices and their spectraBogdan J. Falkowski, Cicilia C. Lozano. 556-559 [doi]
• Determination of pitch of noisy speech using dominant harmonic frequencyMd. Kamrul Hasan, Celia Shahnaz, S. A. Fatath. 556-559 [doi]
• Measurement and SPICE prediction of sub-picosecond clock jitter in A/D convertersAlfio Zanchi, Ioannis Papantonopoulos, F. Tsay. 557-560 [doi]
• A CMOS digitally tunable transconductor for video frequency operationBelén Calvo, Maria Teresa Sanz, Santiago Celma, Pedro A. Martínez. 557-560 [doi]
• Audio signal processing via harmonic separation using variable Laguerre filtersDavid B. H. Tay. 558-561 [doi]
• Fast linearly independent ternary arithmetic transformsBogdan J. Falkowski, Cheng Fu. 560-563 [doi]
• Constrained optimization for a speech driven talking headKyoung-Ho Choi, Jong-Hoon Lee. 560-563 [doi]
• An ultra low-voltage Gm-C filter for video applicationsSaeid Mehrmanesh, Mohammad B. Vahidfar, Hesam Amir Aslanzadeh, Seyed Mojtaba Atarodi. 561-564 [doi]
• A tester-on-chip implementation in 0.18µ CMOS utilizing a MEMS interfaceR. Rashidzadeh, Majid Ahmadi, William C. Miller. 561-564 [doi]
• On the application of variable digital filters (VDF) to the realization of software radio receiversS. C. Chan, K. S. Yeung. 562-565 [doi]
• Ternary arithmetic polynomial expansions based on new transformsBogdan J. Falkowski, Cheng Fu. 564-567 [doi]
• Single Gauss model set-based data imputation method for complex ASR taskYu Luo, Limin Du. 564-567 [doi]
• On-chip debug support for embedded Systems-on-ChipKlaus D. Maier. 565-568 [doi]
• Variable biquadratic digital filter section with simultaneous tuning of the pole and zero frequencies by a single parameterGeorgi Stoyanov, Masayuki Kawamata. 566-569 [doi]
• Stability robustness of interconnected discrete time systems with synchronization errorsPeter H. Bauer, Cédric Lorand, Kamal Premaratne. 568-571 [doi]
• Automatic synchronization of speech transcript and slides in presentationYu Chen, Wei Jyh Heng. 568-571 [doi]
• A modular test structure for CMOS mismatch characterizationMassimo Conti, Paolo Crippa, Francesco Fedecostunte, Simone Orcioni, F. Ricciardi, Claudio Turchetti, Loris Vendrame. 569-572 [doi]
• The tau-cell: a new method for the implementation of arbitrary differential equationsAndré van Schaik, Craig T. Jin. 569-572 [doi]
• Efficient symbol synchronization techniques using variable FIR or IIR interpolation filtersMartin Makundi, Timo I. Laakso. 570-573 [doi]
• Microwave amplifier design for mobile communication via immittance data modellingAli Kilinc, H. Pinarbasi, B. Siddik Yarman, Ahmet Aksen. 572-575 [doi]
• A two-channel training algorithm for hidden Markov model to identify visual speech elementsSay Wei Foo, Yong Lian, Liang Dong. 572-575 [doi]
• Inductorless RF amplifier with tuneable band-selection and image rejectionApinunt Thanachayanont, S. Sae-Ngow. 573-576 [doi]
• Efficient BIST schemes for RNS datapathsD. G. Nikolos, Dimitris Nikolos, Haridimos T. Vergos, Costas Efstathiou. 573-576 [doi]
• On the prediction of period-doubling bifurcations in almost reciprocal cellular neural networksMauro Di Marco, Mauro Forti, Alberto Tesi. 574-577 [doi]
• The new nADPCMB/spl perp/MLT coding scheme: from non linear fullband toward non linear subband prediction coding of speech signalG. D Alessandro, Marcos Faúndez-Zanuy, Francesco Piazza. 576-579 [doi]
• Worst-case tolerance analysis of non-linear systems using evolutionary algorithmsB. De Vivo, Giovanni Spagnuolo, Massimo Vitelli. 576-579 [doi]
• RF, Q-enhanced bandpass filters in standard 0.18µm CMOS with direct digital tuningH. Ahmed, Chris DeVries, Ralph Mason. 577-580 [doi]
• BIST for clock jitter measurementsKuo-Hsing Cheng, Shu-Yu Jiang, Zong-Shen Chen. 577-580 [doi]
• Relations between spatio-temporal phenomena and eigenvalues in mutually coupled CNNsZonghuang Yang, Masayuki Yamauchi, Yoshifumi Nishio, Akio Ushida. 578-581 [doi]
• Computation of projections and eigen distribution in half-planes and disksMohammed A. Hasan, Ali A. Hasan. 580-583 [doi]
• SLAP: a system for the detection and correction of pronunciation for second language acquisitionLingyun Gu, John G. Harris. 580-583 [doi]
• Lumped element model approach for the bandwidth enhancement of coupled microstrip antennaWiset Saksiri, Monai Krairiksh. 581-584 [doi]
• A new initialization technique for asynchronous circuitsKaamran Raahemifar, Majid Ahmadi. 581-584 [doi]
• Coupled chaotic simulated annealing processesJohan A. K. Suykens, Mustak E. Yalcin, Joos Vandewalle. 582-585 [doi]
• Fitting considerations of polynomial device models [semiconductor device modeling]Timo Rahkonen, Antti Heiskanen. 584-587 [doi]
• A time-domain technique for computation of noise spectral density in switched capacitor circuitsVinita Vasudevan. 585-588 [doi]
• Case study of cost and performance trade-off analysis for mixed-signal integration in system-on-chipMeigen Shen, Li-Rong Zheng, Hannu Tenhunen. 585-588 [doi]
• Classification of synchronized states in CNNs with higher order cellsAntonio Andreescu, Zbigniew Galias, Maciej Ogorzalek. 586-589 [doi]
• Modeling skin effect with reduced decoupled R-L circuitsShizhong Mei, Yehea I. Ismail. 588-591 [doi]
• A new algorithm for voice activity detectionJianqiang Wei, Limin Du, Zhaoli Yan, Hui Zeng. 588-591 [doi]
• Fast prototyping of reconfigurable architectures from a C programSebastien Bilavarn, Guy Gogniat, Jean Luc Philippe, Lilian Bossuet. 589-592 [doi]
• New low-power low-voltage differential class-AB OTA for SC circuitsRamón González Carvajal, Juan Antonio Gómez Galán, Jaime Ramírez-Angulo, Antonio Jesús Torralba Silgado. 589-592 [doi]
• On the effect of boundary conditions on CNN dynamics: stability and instability, bifurcation processes and chaotic phenomenaIstván Petrás, Paolo Checco, Marco Gilli, Tamás Roska, Mario Biey. 590-593 [doi]
• Evaluate loss probabilities of packet-awareness coder into queuing networksJ. Chen. 592-595 [doi]
• Efficient interconnect modeling by Finite Difference Quadrature methodsQinwei Xu, Pinaki Mazumder. 592-595 [doi]
• Interface design approach for system on chip based on configurationIssam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc Philippe. 593-596 [doi]
• A 0.35µm CMOS voltage derivative sensor with sign and inflection outputsGerry Quilligan, D. P. Burton. 593-596 [doi]
• 1/f noise modeling using discrete-time self-similar systemsRajesh Narasimha, S. B. Rachaiah, Raghuveer M. Rao, P. R. Mukund. 596-599 [doi]
• Secure the image-based simulated telesurgery systemYanjiang Yang, Zhenlan Wang, Feng Bao, Robert H. Deng. 596-599 [doi]
• Noise-shaping modulation in high-Q SC filtersJosé L. Ausín, Miguel Angel Domínguez, J. Francisco Duque-Carrillo, Guido Torelli. 597-600 [doi]
• Circuit design from optimal wavelet packet series expressionsKaren O. Egiazarian, Jaakko Astola, Radomir S. Stankovic, Milena Stankovic. 597-600 [doi]
• High level accuracy loss estimates for a class of analog/digital systemsCesare Alippi, Marco Stellini. 600-603 [doi]
• An Integrated Framework of Design Optimization and Space Minimization for DSP applicationsQingfeng Zhuge, Edwin Hsing-Mean Sha, Chantana Chantrapornchai. 601-604 [doi]
• Non-uniform sampling SC circuits based on noise-shaping feedback codingJosé L. Ausín, J. Francisco Duque-Carrillo, Guido Torelli, Jorge Sánchez Valverde. 601-604 [doi]
• RF power control in GSM systems for constant and non constant envelope modulation schemesR. Becker, W. Groeneweg, R. Burdenski. 602-605 [doi]
• A novel de-interlacing technique based on phase plane correlation motion estimationMainak Biswas, Truong Q. Nguyen. 604-607 [doi]
• Closed form metrics to accurately model the response in general arbitrarily-coupled RC treesDinesh Pamunuwa, Shauki Elassaad. 604-607 [doi]
• Reducing the number of variable movements in exact BDD minimizationRüdiger Ebendt. 605-608 [doi]
• Design of low-voltage low-power SC filters for high-frequency applicationsWalter Aloisi, Gianluca Giustolisi, Gaetano Palumbo. 605-608 [doi]
• EDGE data receiver designDoug Grant, Marko Kocic, Lidwine Martinot, Zoran Zvonar. 606-609 [doi]
• PODEA: Power delivery efficient analysis with realizable model reductionRong Jiang, Tsung-Hao Chen, Charlie Chung-Ping Chen. 608-611 [doi]
• A zerotree stereo video encoderS. Thanapirom, Warnakulasuriya Anil Chandana Fernando, Eran A. Edirisinghe. 608-611 [doi]
• A novel improvement technique for high-level test synthesisSaeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jahangir. 609-612 [doi]
• 5th order electro-thermal multi-tone Volterra simulator with component-level outputAntti Heiskanen, Timo Rahkonen. 612-615 [doi]
• A modified method for codebook design with neural network in VQ sed image compressionSafar Hatami, Mohammad Javad Yazdanpanah, B. Forozandeh, Omid Fatemi. 612-615 [doi]
• Synthesis and optimization of interfaces between hardware modules with incompatible protocolsVassilis Androutsopoulos, T. J. W. Clarke, Mike Brookes. 613-616 [doi]
• A 2.5 V switched-current sigma-delta modulator with a novel class AB memory cellShuenn-Yuh Lee, Yueh-Lun Tsai, Wei-Zen Su, Po-Hui Yang. 613-616 [doi]
• Combined GMSK and 8PSK modulator for GSM and EDGEPeter Bode, Alexander Lampe, Markus Helfenstein. 614-617 [doi]
• A 5th order Volterra study of a 30W LDMOS power amplifierAntti Heiskanen, Janne Aikio, Timo Rahkonen. 616-619 [doi]
• Performance optimization for motion compensated 2D wavelet video compression techniquesZhen Li, Feng Wu, Shipeng Li, Edward J. Delp. 616-619 [doi]
• Analysis of phase noise due to bang-bang phase detector in PLL-based clock and data recovery circuitsKasin Vichienchom, Wentai Liu. 617-620 [doi]
• Control signal sharing of asynchronous circuits using datapath delay informationHiroshi Saito, Euiseok Kim, Masashi Imai, Nattha Sretasereekul, Hiroshi Nakamura, Takashi Nanya. 617-620 [doi]
• Cell clinics for bioelectronic interface with single cellsPamela Abshire, Jean-Marie Lauestein, Yingkai Liu, Elisabeth Smela. 618-621 [doi]
• A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time Sigma-Delta modulatorsJ. Moreno-Reina, José Manuel de la Rosa, Fernando Manuel Medeiro Hidalgo, R. Romay, Rocio del Río, Maria Belen Pérez-Verdú, Ángel Rodríguez-Vázquez. 620-623 [doi]
• Efficient and fully scalable encryption for MPEG-4 FGSChun Yuan, Bin B. Zhu, Yidong Wang, Shipeng Li, Yuzhuo Zhong. 620-623 [doi]
• Analogue interpolation based direct digital frequency synthesisAlistair McEwan, Steve Collins. 621-624 [doi]
• Multitasking in hardware-software codesign for reconfigurable computerTheerayod Wiangtong, Peter Y. K. Cheung, Wayne Luk. 621-624 [doi]
• Advanced biochip: principle and applications in medical diagnostics and pathogen detectionT. Vo-Dinh, G. D. Griffin, A. L. Wintenberg, D. L. Stokes, J. Mobley, M. Askari, R. Maples. 622-625 [doi]
• Low-complexity global motion estimation based on content analysisFang Zhu, Ping Xue, Ee Ping Ong. 624-627 [doi]
• Discrete-time modeling and simulation of vehicle audio systemsFrancesco Piazza, S. Bartoloni, R. Toppi, M. Navarri, M. Pontillo, F. Bettarelli, A. Lattanzi. 624-627 [doi]
• A sine-output ROM-less direct digital frequency synthesiser using a polynomial approximationCharan Meenakarn, Apinunt Thanachayanont. 625-628 [doi]
• System-on-Chip design using intellectual properties with imprecise design costsByoung-Woon Kim, Chong-Min Kyung. 625-628 [doi]
• Analysis of a simple A/D converter with a trapping windowToshimichi Saito, H. Imamura. 626-629 [doi]
• Global motion estimation from coarsely sampled motion vector field and the applicationsYeping Su, Ming-Ting Sun, Vincent Hsu. 628-631 [doi]
• Nonlinear analysis of a Colpitts injection-locked frequency dividerU. Yodprasit, Christian C. Enz. 629-632 [doi]
• Automatic localization of craniofacial landmarks for assisted cephalometryIdris El-Feghi, Maher A. Sid-Ahmed, Majid Ahmadi. 630-633 [doi]
• Accurate VHDL-based simulation of Sigma-Delta modulatorsR. Castro-López, Francisco V. Fernández, Fernando Manuel Medeiro Hidalgo, Ángel Rodríguez-Vázquez. 632-635 [doi]
• A robust global motion estimation scheme for sprite codingHoi-Kok Cheung, Wan-Chi Siu. 632-635 [doi]
• A systolic multiplier with LSB first algorithm over GF(2/sup m/) which is as efficient as the one with MSB first algorithmSoonhak Kwon, Chang Hoon Kim, Chun-Pyo Hong. 633-636 [doi]