Abstract is missing.
- A 200-kHz/6.78-MHz wireless power transmitter featuring concurrent dual-band operationDukju Ahn, Jiwoong Park, Patrick P. Mercier. 1-2 [doi]
- Electrical performance analysis of biogas fuelled generator with purifierArnold C. Paglinawan, Edison E. Mojica. 3-4 [doi]
- Power and area calibration of switch arbiter for high speed switch control and scheduling in network-on-chipSangeeta Singh, Jvr Ravindra, B. Rajendra Naik. 5-6 [doi]
- An efficient on-chip network with packet compression capabilityM. Vafaiee, M. Jalili, Reza Sabbaghi-Nadooshan, Hamid Sarbazi-Azad. 7-8 [doi]
- Prediction-based latency compensation technique for head mounted displaySong-Woo Choi, Min-Woo Seo, Suk-Ju Kang. 9-10 [doi]
- Review of low power image sensors for always-on imagingJaehyuk Choi. 11-12 [doi]
- MEMS resonator based thermometer SoC design in CMOS 0.18 μm standard processChong-Yang Lin, Kuei-Ann Wen. 13-14 [doi]
- A decouple structured gyroscope with integrated readout circuit on standard 0.18pm 1P6M CMOS technologyChun-Lin Chien, Kuei-Ann Wen. 15-16 [doi]
- Monolithic MEMS resonator based pressure sensor and readout designPo-Chun Chuang, Kuei-Ann Wen. 17-18 [doi]
- Implementation of RF frequency synthesizer for smart utility network systemDong-Shik Kim, Won Sang Yoon, Sang-Hoon Chai. 19-20 [doi]
- LNA topologies for RX carrier aggregationJusung Kim, Keunkwan Ryu, Sungchan Kim, Sang-Hun Lee. 21-22 [doi]
- A design of dual-band smart tagJin-Ho Kim, Yong Moon. 23-24 [doi]
- Design of 28GHz CMOS phased array T/R circuits for 3-dimensional beamforming applicationsSungjin Shin, Hyunchol Shin. 25-26 [doi]
- A study of META-voltage controlled oscillator and prescaler using 65nm CMOS process: META-VCO and prescaler using 65nm CMOS precessNo Yong Kwon, Bora Kim, Yong Moon. 27-28 [doi]
- Recent advances in TSV inductors for 3D IC technologyBruce C. Kim, Sang-Bock Cho. 29-30 [doi]
- Approximate stochastic computing (ASC) for image processing applicationsRamu Seva, Prashanthi Metku, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi. 31-32 [doi]
- Design and implementation of multi-mode block adaptive quantizer for synthetic aperture radarYu-Liang Tsai, Pei-Yun Tsai, Ching-Horng Lee, Li-mei Chen, Sz-Yuan Lee. 33-34 [doi]
- Mapping table-based fisheye image correction for low computational complexityYong Deok Ahn, Suk-Ju Kang. 35-36 [doi]
- Cryptographie coprocessor design for IoT sensor nodesWeizhen Wang, Jun Han, Zhicheng Xie, Shan Huang, Xiaoyang Zeng. 37-38 [doi]
- Software-based embedded core test using multi-polynomial for test data reductionSoyeon Kang, Inhyuk Choi, Hyeonchan Lim, Sungyoul Seo, Sungho Kang. 39-40 [doi]
- Motion vector smoothing of boundary of moving object for frame rate up-conversionHo Sub Lee, Suk-Ju Kang, Young-Hwan Kim. 41-42 [doi]
- Low-power and real-time computer vision on-chipWei Pang, Hantao Huang, Fengwei An, Hao Yu. 43-44 [doi]
- Image interpolation based on Hessian analysisSangho Yoon, Young-Hwan Kim. 45-46 [doi]
- Sharpness-aware real-time haze removal for advanced driver assistance systemsJoonggeun Ahn, Jihoon Kim, Youngjoo Lee. 47-48 [doi]
- A new scheme for secret-hiding in DSP circuitsSumedh Dhabu, Chip-Hong Chang. 49-50 [doi]
- A programmable ΔΣ SAR-ADC with charge shuttling techniqueKohei Yamada, Yosuke Toyama, Hiroki Ishikuro. 51-52 [doi]
- 11-Bit 1.8uW 40KS/s segmented SAR ADC for sensor applicationsBehnam Samadpoor Rikan, Sang Yun Kim, Kang-Yoon Lee. 55-56 [doi]
- A pipelined time stretching for high throughput counter-based time-to-digital convertersSeongheon Shin, Hyung-Joun Yoo. 57-58 [doi]
- A low-jitter self-biased phase-locked loop for SerDesHengzhou Yuan, Yang Guo, Yao Liu 0001, Bin Liang, Qian-cheng Guo, Jia-wei Tan. 59-60 [doi]
- 36-Gb/s CDR IC using simple passive loop filter combined with passive load in phase detectorKeiji Kishine, Hiroshi Inoue, Kosuke Furuichi, Natsuyuki Koda, Hiromu Uemura, Hiromi Inaba, Makoto Nakamura, Akira Tsuchiya. 61-62 [doi]
- All-synthesizable transmitter driver and data recovery circuit for USB2.0 interfaceKihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong June Park. 63-64 [doi]
- Power-efficient partially-adaptive routing in on-chip mesh networksM. Jalili, J. Bourgeois, H. Sarbazi-Azad. 65-66 [doi]
- Hash-table and balanced-tree based FIB architecture for CCN routersKenta Shimazaki, Takashi Aoki, Takahiro Hatano, Takuya Otsuka, Akihiko Miyazaki, Toshitaka Tsuda, Nozomu Togawa. 67-68 [doi]
- Low latency IFFT design for 3GPP LTEYeon-Jin Kim, Zhe-Yan Piao, Jin-Gyun Chung, In-Gul Jang, Kyung-Ju Cho. 69-70 [doi]
- A 0.5V/22 μW low power transceiver IC for use in ESC intra-body communication systemYuhwai Tseng, Ting-You Lin, Songwen Yau, Yingchieh Ho, Chauchin Su. 71-72 [doi]
- Area efficient neuromorphic circuit based on stochastic computationKiwon Yoon, Suhyeong Choi, Youngsoo Shin. 73-74 [doi]
- A 4.1mA adaptive duty-cycle corrector loop with background calibration in 45nm CMOS processEsther Kim, Deokgwan Jeong, Taehyoun Oh. 75-76 [doi]
- A new approach to binarizing neural networksJungwoo Seo, Joonsang Yu, Jongeun Lee, Kiyoung Choi. 77-78 [doi]
- Customized SRAM design for low power video code applicationsSangkyu Lee, Hoyoung Tang, Kyungrak Choi, Jongsun Park. 79-80 [doi]
- ISFET with built-in calibration registers through segmented eight-bit binary search in three-point algorithm using FPGACyrel Ontimare Manlises, Febus Reidj G. Cruz, Wen-Yaw Chung. 81-82 [doi]
- Power-efficient partitioning and cluster generation design for application-specific Network-on-ChipJiayi Ma, Cong Hao, Wencan Zhang, Takeshi Yoshimura. 83-84 [doi]
- Computation of modular multiplicative inverses using residue signed-digit additionsShugang Wei. 85-86 [doi]
- Design techniques for ultra-efficient computingDongsuk Jeon. 87-88 [doi]
- An ultra-low power AES encryption core in 65nm SOTB CMOS processVan-Phuc Hoang, Van-Lan Dao, Cong-Kha Pham. 89-90 [doi]
- Cell-based delay locked loop compilerPei-Ching Huang, Shi-Yu Huang. 91-92 [doi]
- Hybrid GDI-NCL for area/power reductionPrashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi. 93-94 [doi]
- A high-performance circuit design algorithm using data dependent approximationKazushi Kawamura, Masao Yanagisawa, Nozomu Togawa. 95-96 [doi]
- Discussion of cost-effective redundancy architecturesKeewon Cho, Jooyoung Kim, Hayoung Lee, Sungho Kang. 97-98 [doi]
- Equalization scheme analysis for high-density spin transfer torque random access memoryBeomsang Yoo, Taehui Na, Byungkyu Song, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang. 99-100 [doi]
- Variation-tolerant and low power look-up table (LUT) using spin-torque transfer magnetic RAM for non-volatile field programmable gate array (FPGA)Kangwook Jo, Kyungseon Cho, Hongil Yoon. 101-102 [doi]
- Disturb-free 5T loadless SRAM cell design with multi-vth transistors using 28 nm CMOS processChua-Chin Wang, Chia-Lung Hsieh. 103-104 [doi]
- Single-flux-quantum cache memory architectureKoki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue. 105-106 [doi]
- Parallel decoding for multi-stage BCH decoderPrashanthi Metku, Ramu Seva, Kyung Ki Kim, Yong-Bin Kim, Minsu Choi. 107-108 [doi]
- A RAM cache approach using host memory buffer of the NVMe interfaceJuHyung Hong, Sangwoo Han, Eui-Young Chung. 109-110 [doi]
- A passband lock loop circuit system for band pass filterHung-Wen Lin, Jin-Yi Lin. 111-112 [doi]
- A 11mV single stage thermal energy harvesting regulator with effective control scheme for extended peak loadV. Priya, Murali K. Rajendran, Shourya Kansal, Ashudeb Dutta. 113-114 [doi]
- Buffer with Neuron MOSFETs for class-G headphone driverYuki Matsuda, Akio Shimizu, Yohei Ishikawa, Sumio Fukai. 115-116 [doi]
- Energy-efficient spread second capacitor capacitive-DAC for SAR ADCsSung-Min Lee, Ju Eon Kim, Dong Hyun Yoon, Kwang-Hyun Baek. 117-118 [doi]
- A design of new voltage to current converter with high linearity and wide tuningYui-Hwan Sa, Pyo-Hoon Son, Ki Hong Kim, Hi-Seok Kim, Hyeong-Woo Cha. 119-120 [doi]
- A fully integrated high-efficiency step-up DC-DC converter for energy harvesting applicationsSeyed Mohammad Noghabaei, Mohamad Sawan. 121-122 [doi]
- An integrated optical parallel adder as a first step towards light speed data processingTohru Ishihara, Akihiko Shinya, Koji Inoue, Kengo Nozaki, Masaya Notomi. 123-124 [doi]
- Integrated circuits design using carbon nanotube field effect transistorYong-Bin Kim. 125-126 [doi]
- Memory efficient hardware accelerator for kernel support vector machine based pedestrian detectionAsim Khan, Chong-Min Kyung. 127-128 [doi]
- A TSV test structure for simultaneously detecting resistive open and bridge defects in 3D-ICsYoung-Woo Lee, Junghwan Kim, Inhyuk Choi, Sungho Kang. 129-130 [doi]
- Novel pixel calibration circuit for bolometer-type uncooled infrared image sensorSang Hwan Kim, Byoung Soo Choi, Jang-Kyoo Shin, Jae-Hyoun Park, Kyoung-Il Lee. 131-132 [doi]
- A novel frequency-shift readout system for CEA concentration detection applicationDeng-Shian Wang, Yun-Shen Liu, Chua-Chin Wang. 133-134 [doi]
- Design of a configurable bit-resolution CMOS image sensor for the image depth extractionSeongjoo Lee, Minkyu Song. 139-140 [doi]
- P-backtracking: A new scan chain diagnosis method with probabilityTae-Hyun Kim, Hyunyul Lim, Sungho Kang. 141-142 [doi]
- Design-time energy optimization for asymmetric multiprocessor system-on-chipYonghee Yun, Young-Hwan Kim. 143-144 [doi]
- eFuse based IC authentication architectureSeung-Yeob Lee, Joon-Sung Yang. 145-146 [doi]
- Process variation-aware bridge fault analysisHeetae Kim, Inhyuk Choi, Jaeil Lim, Hyunggoy Oh, Sungho Kang. 147-148 [doi]
- A test methodology to screen scan-path failuresJunghwan Kim, Young-Woo Lee, Minho Cheong, Sungyoul Seo, Sungho Kang. 149-150 [doi]
- CMOS energy efficient integrated radios for emerging low power standardsMustafijur Rahman, Ramesh Harjani. 151-152 [doi]
- A 400MHz 3-10Mbps transceiver IC with ∼0.3 nJ/bit TX/RX energy efficiency for body area applicationsZhaoyang Weng, Jingjing Dong, Hanjun Jiang, Zhihua Wang. 153-154 [doi]
- Time-varying circuit approaches for software defined and cognitive radio applicationsS. Pamarti, N. Sinha, S. Hameed, M. Rachid. 155-156 [doi]
- A 0.5-V sub-mW energy-efficient receiver in 0.18-μm CMOS for IoT applicationsTse-Wei Wang, Yi-Lin Tsai, Chong-Rong Lee, Fu-Lian Hung, Tsung-Hsien Lin. 157-158 [doi]
- Automatic image deviation detection for AVM auto-calibrationJiwon Bang, Junghwan Pyo, Yongjin Jeong. 159-160 [doi]
- Hardware implementation of fast traffic sign recognition for intelligent vehicle systemEunchong Lee, Sang-Seol Lee, Youngbae Hwang, Sung-Joon Jang. 161-162 [doi]
- Front collision warning based on vehicle detection using CNNJunghwan Pyo, Jiwon Bang, Yongjin Jeong. 163-164 [doi]
- Development of burst error effect reduction algorithm for CAN using interleaver methodRonnie O. Serfa Juan, Min Woo Jeong, Hi-Seok Kim. 165-166 [doi]
- Hardware implementation of aggregated channel features for ADASHohyon Song, Bosun Jeong, Hyunkyu Choi, Taeho Cho, Hweihn Chung. 167-168 [doi]
- Improvements in parallel SIMD implementation of single image defoggingKristofor B. Gibson, Truong Q. Nguyen, Hannoh Yoon. 169-170 [doi]
- Dehazing in color filter array domainYeejin Lee, Truong Q. Nguyen, Changyoung Han. 171-172 [doi]
- Nighttime image enhancement applying dark channel prior to raw data from cameraYan Gong, Yeejin Lee, Truong Q. Nguyen. 173-174 [doi]
- Pedestrian detection aided by temporal priorZhaowei Cai, Matthew Jacobsen, Nuno Vasconcelos. 175-176 [doi]
- Moving objects detection using classifying object proposals for driver assistance systemKunyao Chen, Subarna Tripathi, Youngbae Hwang, Truong Q. Nguyen. 177-178 [doi]
- Dense stereo-based real-time ROI generation for on-road obstacle detectionSoon Kwon, Hyuk-Jae Lee. 179-180 [doi]
- High bandwidth memory(HBM) with TSV techniqueJong Chern Lee, Jihwan Kim, Kyung-whan Kim, Young Jun Ku, Dae Suk Kim, Chunseok Jeong, Tae Sik Yun, Hongjung Kim, Ho Sung Cho, Sangmuk Oh, Hyun Sung Lee, Ki Hun Kwon, Dong Beom Lee, Young Jae Choi, Jaejin Lee, Hyeon Gon Kim, Jun Hyun Chun, Jonghoon Oh, Seok Hee Lee. 181-182 [doi]
- Emulation of processing in memory architecture for application developmentJinsan Kwon, Taeho Hwang, Dong-Sun Kim. 183-184 [doi]
- Implementation of a low-overhead processing-in-memory architectureYoung-Jong Jang, Byung-Soo Kim, Dong-Sun Kim, Taeho Hwang. 185-186 [doi]
- High density PCM(phase change memory) technologyHongsik Jeong. 187-188 [doi]
- Robust optical fingerprint sensor to moisture fingerprintsYoung Hyun Baek. 189-190 [doi]
- Deep learning application trial to lung cancer diagnosis for medical sensor systemsRyota Shimizu, Shusuke Yanagawa, Yasutaka Monde, Hiroki Yamagishi, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda. 191-192 [doi]
- Normally-off power management for sensor nodes of global navigation satellite systemTakashi Nakada, Hiroshi Nakamura, Toshifumi Nakamoto, Toru Shimizu. 193-194 [doi]
- Low-power multi-sensor system with normally-off sensing technology for IoT applicationsMasanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Hiroyuki Kondo. 195-196 [doi]
- A large scale access-control list for IoT security comprising embedded IP-core and DDR DRAMKazunari Inoue, Yuji Yano. 197-198 [doi]
- 2 processing architecture - High reliability and low power computing for novel nano tactile sensor arrayKiyotaka Komoku, Kazutami Arimoto, Tomoyuki Yokogawa, Hitoshi Yamauchi, Yoichiro Sato, Hidekuni Takao. 199-200 [doi]
- Attack sensing against EM leakage and injectionNoriyuki Miura, Shivam Bhasin. 201-202 [doi]
- How to design hardware prime field multipliers for bilinear pairingDaisuke Fujimoto, Yusuke Nagahama, Tsutomu Matsumoto. 203-204 [doi]
- A lightweight metric for the evaluation of network congestion in NoC-based MPSoCYang Huang, Letian Huang, Xiaohang Wang. 205-206 [doi]
- An efficient FPGA implementation for odd-even sort based KNN algorithm using OpenCLHai Peng, Letian Huang, John Chen. 207-208 [doi]
- An address remapping algorithm to reduce power consumption in NoC-based chip-multiprocessorsShuyu Chen, Letian Huang, Song Li. 209-210 [doi]
- Neural network based seizure detection system using raw EEG dataTianchan Guan, Xiaoyang Zeng, Letian Huang, Tianchan Guan, Mingoo Seok. 211-212 [doi]
- Low-cost concurrent error detection schemes for logarithmic convertersTso-Bing Juang, Ying-Ren Lee, Chin-Chieh Chiu. 213-214 [doi]
- Digital image preprocessing and hair artifact removal by using Gabor waveletUzma Jamil, Shehzad Khalid, M. Usman Akram. 215-216 [doi]
- A flexible software defined radio-based UHF RFID reader based on the USRP and LabViewYuechun Wang, Ka Lok Man, Robert G. Maunder, Jin-Kyung Lee, Kyung Ki Kim. 217-218 [doi]
- Radio frequency energy harvesting technologyLanxiang Wang, Menglong He, Zhao Wang, Mark Leach, Jing Chen Wang, Ka Lok Man, Eng Gee Lim. 219-220 [doi]
- Skew control methodology for useful-skew implementationSangGi Do, Seungwon Kim, Seokhyeong Kang. 221-222 [doi]
- μPnP-WAN: Wide area plug and play sensing and actuation with LoRaFan Yang, Gowri Sankar Ramachandran, Piers Lawrence, Sam Michiels, Wouter Joosen, Danny Hughes 0001. 225-226 [doi]
- CAN FD controller for in-vehicle systemJung Woo Shin, Jung-Hwan Oh, Sang Muk Lee, Seung Eun Lee. 227-228 [doi]
- Design of an area-efficient hardware filter for embedded systemJi Kwang Kim, Oh Seong Gwon, Seung Eun Lee. 229-230 [doi]
- A network architecture design of embedded system for media service in busSang-Yub Lee, Duck Keun Park, Jae-Jin Ko, Jae Kyu Lee, Choul Jun Kang. 231-232 [doi]
- A study on improvement of recognition accuracy by applying machine learning algorithms to the vision-based traffic condition analysis systemKeonhee Lee, Hyuntae Ju, Yong Mu Jeong, Soo-Young Min. 233-234 [doi]
- A study on improvement of vision-based traffic condition analysis system by comparing feature data of imagesEun-Ae Park, Hyuntae Ju, Yong Mu Jeong, Soo-Young Min. 235-236 [doi]
- A study on river water level monitoring method in a debris barrierHyo Sub Choi, Deepak Ghimire. 237-238 [doi]
- Software design for GUI display in the wearable deviceGyutae Oh, Inhye Park, Sang-Yub Lee, Jae-Jin Ko. 239-240 [doi]
- Resolution tunable ring oscillator type TDCHimchan Park, Zhang-Zhi Yu, Jinwoo Kim, Jinwook Burm. 241-242 [doi]
- Novel 8-T CNFET SRAM cell design for the future ultra-low power microelectronicsYoungbae Kim, Qiang Tong, Ken Choi, Yunsik Lee. 243-244 [doi]
- A MDLL-based multi-phase clock multiplierJunsub Yoon, Jongsun Kim. 247-248 [doi]
- Proposal for sensitive frequency demodulator for 10-Gb/s transmission labeling signal systemNatsuyuki Koda, Kosuke Furuichi, Hiromu Uemura, Hiromi Inaba, Keiji Kishine. 249-250 [doi]
- A transient enhanced external capacitor-less LDO with a CMOS only sub-bandgap voltage referenceChang Bum Park, Chan-Kyeong Jung, Shin-Il Lim. 251-252 [doi]
- A fast-locking clock multiplying DLLJongsun Kim, Bongho Bae. 253-254 [doi]
- A CMOS 10-bit SAR ADC with threshold configuring comparator for 5 MSBsSang-Heon Lee, Seong Jae Hyeon, Kim Jong Gu, Kwang Sub Yoon. 255-256 [doi]
- A low-power 10-bit single-slope ADC using power gating and multi-clocks for CMOS image sensorsByoung-Kwan Jeon, Seong-Kwan Hong, Oh-Kyong Kwon. 257-258 [doi]
- A 200-Mb/s to 3-Gb/s wide-band referenceless CDR using bidirectional frequency detectorNguyen Huu Tho, Kyung-Sub Son, Kyongsu Lee, Jin-Ku Kang. 259-260 [doi]
- Design of high-linearity delay detection circuit for 10-Gb/s communication system in 65-nm CMOSKosuke Furuichi, Hiromu Uemura, Natsuyuki Koda, Hiromi Inaba, Keiji Kishine. 261-262 [doi]
- Design of pseudo-random bit sequence generator with adjustable sinusoidal jitterHong-Jhih Chen, Jau-Ji Jou, Tien-Tsorng Shih. 263-264 [doi]
- A study of the referenceless CDR based on PLLJihoon Kim, YoungJu Hwang, Yong Moon. 265-266 [doi]
- A design of NFC analog front-end with the frequency selectorJin-Ho Kim, Yong Moon. 267-268 [doi]
- Speed-adaptive ratio-based lane detection algorithm for self-driving vehiclesSeongrae Kim, Junhee Lee, Youngmin Kim. 269-270 [doi]
- A design of tunable component for font end moduleSuk-Hui Lee, Ki-Jin Kim, Kwang-Ho Ahn, Sung-il Bang. 271-272 [doi]
- Efficient and real-time stereo matching hardware architecture for high-resolution imageHaengson Son, Seonyoung Lee, Kyoungwon Min. 273-274 [doi]
- A low-power, low-noise neural recording amplifier for implantable biomedical devicesHyung Seok Kim, Hyouk-Kyu Cha. 275-276 [doi]
- Design of emotion lighting control system on the power spectrum algorithmSu-Jeong Yun, Chi-Ho Lin. 277-278 [doi]
- A low-power capacitive-feedback CMOS neural recording amplifier for biomedical applicationsHyung Seok Kim, Hyouk-Kyu Cha. 279-280 [doi]
- Development of an IoT-based visitor detection systemHyoung-Ro Lee, Chi-Ho Lin, Won-jong Kim. 281-282 [doi]
- Current mode four-quadrant multiplier design using CNTFETGyunam Jeon, Minsu Choi, Kyung Ki Kim, Yong-Bin Kim. 283-284 [doi]
- A flexible MCMC detector ASICDominik Auras, Sebastian Birke, Tobias Piwczyk, Rainer Leupers, Gerd Ascheid. 285-286 [doi]
- Throughput enhancemnet with optimal fragmented MSDU size for fragmentation and aggregation scheme in WLANsEunbi Ku, Chulho Chung, Byungcheol Kang, Jaeseok Kim. 287-288 [doi]
- Design of NFC transceiver for automotive applicationsYeong-Gyo Gim, Shiho Kim. 289-290 [doi]
- Possibility verification of drone detection radar based on pseudo random binary sequenceSung-Jun Lee, Jae Ho Jung, Bong-Hyuk Park. 291-292 [doi]
- Design of low latency successive cancellation decoder for polar codesZhe-Yan Piao, Jin-Gyun Chung. 293-294 [doi]
- 3) to reduce error distance for image processorSunghyun Kim, Youngmin Kim. 295-296 [doi]
- Artificial neural network implementation in FPGA: A case studyShuai Li, Ken Choi, Yunsik Lee. 297-298 [doi]
- Resource-efficient FPGA architecture of Canny edge detectorYunseok Jang, Junwon Mun, Jaeseok Kim. 299-300 [doi]
- Standing wave oscillator based clock distributionWei Zhang, Youde Hu, Keji Cui, Dongxuan Bao, Dashan Pan, Lebo Wang, Li-Rong Zheng. 301-302 [doi]
- Area-efficient and high-speed binary divider architecture for bit-serial interfacesYunho Park, Jonghyuk Kwon, Youngjoo Lee. 303-304 [doi]
- Hardware design exploration of fully-connected deep neural network with binary parametersJinkyu Kim, Juyeob Kim, Byungjo Kim, Miyoung Lee, Joohyun Lee. 305-306 [doi]
- A pre-characterization method for multiple single-event transient analysis in cell-based designsJ.-K. Park, J.-S. Go, J. T. Kim. 307-308 [doi]
- Hardware implementation of fast high dynamic range processor for real-time 4K UHD videoSang-Seol Lee, Eunchong Lee, Youngbae Hwang, Sung-Joon Jang. 309-310 [doi]
- A low power, high speed FinFET based 6T SRAM cell with enhanced write ability and read stabilityRahaprian Mudiarasan Premavathi, Qiang Tong, Ken Choi, Yunsik Lee. 311-312 [doi]
- A dual-retention time architecture towards secure and high performance STT-RAM main memory subsystemTaemin Lee, Sungjoo Yoo. 313-314 [doi]
- Selective refresh to avoid read disturb errors in STT-RAM main memoryTaemin Lee, Sungjoo Yoo. 315-316 [doi]
- Design of eMMC controller with multiple channelsChulhoon Kim, Chanho Lee. 317-318 [doi]
- Energy-based iterative cost aggregation in depth estimation with a stereo cameraNguyen Xuan Truong, Huyk-Jae Lee. 319-320 [doi]
- Implementation of Low complexity inter prediction for IoT systemsJaehyuk So, Junwon Mun, Kyungmook Oh, Jaeseok Kim. 321-322 [doi]
- Halo effect suppression for single image haze removal methodGeun-Jun Kim, Bongsoon Kang. 323-324 [doi]
- A design of real time detection IP with color detection for surveillanceChang Hee Park, Hyun-Tae Kim, Young Min Jang, Sang-Bock Cho. 325-326 [doi]
- Non-photorealistic rendering from real video sequences with discontinuity reduction using fast video segmentationLu Xiao, Xiao-Xuan Huang, Yi-Chang Lu. 327-328 [doi]
- An H.265/HEVC 4K UHD slim codec design with shared prediction unit architectureSukho Lee, Hyunmi Kim. 329-330 [doi]
- Fast CU size decision method for HEVC using CU split information of adjacent framesYoung-Ho Kim, Tae-Sun Kim, Myung Hoon Sunwoo, Jae Heon Jeong. 331-332 [doi]
- The parallelization of convolution on a CNN using a SIMT based GPGPUHeekyeong Jeon, Kwanho Lee, Seonghyung Han, Kwangyeob Lee. 333-334 [doi]
- Transmission timing configuraiton for control and non-payload communication of unmanned aerial vehicleTae-Chul Hong, Kunseok Kang, Kwangjae Lim, Jae Young Ahn. 335-336 [doi]
- A system-level design of MapReduce-based embedded multiprocessor system-on-chipsHuajuan Zhang, Hao Xiao, Ning Wu. 337-338 [doi]
- Radio-frequency energy-harvesting IC with DC-DC converterDonghoon Seong, Kichang Jang, Wonjoon Hwang, Hyeondeok Jeon, Joongho Choi. 339-340 [doi]
- Design and verification of sensorless BLDC motor start-up logic with FPGAHyun-young Lee, Byeong-Chan Jeon, Won-ki Park, Sung Chul Lee. 341-342 [doi]
- A dimmable and power-compensated AC direct LED driver with high efficiencyDonglie Gu, Shengpeng Tang, Jianxiong Xi, Lenian He, Kexu Sun. 343-344 [doi]
- HV switch using differential voltage shaping driver for 13 series li-ion battery cells BMSTzung-Je Lee. 345-346 [doi]
- A CMOS buck converter with PFM / hysteretic modeTae-Heon Lee, Jong-Gu Kim, Kwang Sub Yoon. 347-348 [doi]
- A single inductor multiple output(SIMO) buck/boost DC-DC converter with output error-driven random controlHyunbin Park, Shiho Kim. 349-350 [doi]
- A synchronous boost converter with high speed and high accuracy peak current control unitShengpeng Tang, Xianzhi Meng, Donglie Gu, Jianxiong Xi, Lenian He, Kexu Sun. 351-352 [doi]
- A digital low-dropout(DLDO) regulator with 14dB power supply rejection enhancementByung Gun Joung, Yangho Seo, Chulwoo Kim. 353-354 [doi]
- FPGA power estimation simulator for dynamic input dataTaehee You, Jeongbin Kim, Minyoung Im, Eui-Young Chung. 355-356 [doi]
- Full system verification of compatible microprocessors with a dual physical core verification platformJyun-Yan Li, Ing-Jer Huang. 357-358 [doi]
- Memory ECC architecutre utilizing memory column sparesJong Hyuk Park, Joon-Sung Yang. 359-360 [doi]