Abstract is missing.
- Opening and keynote 1Yale N. Patt. 1 [doi]
- Eccentric and fragile benchmarksHans Vandierendonck, Koen De Bosschere. 2-11 [doi]
- Communication breakdown: analyzing CPU usage in commercial Web workloadsJaidev P. Patwardhan, Alvin R. Lebeck, Daniel J. Sorin. 12-19 [doi]
- StatCache: a probabilistic approach to efficient and accurate data locality analysisErik Berg, Erik Hagersten. 20-27 [doi]
- Sockets Direct Protocol over InfiniBand in clusters: is it beneficial?Pavan Balaji, Sundeep Narravula, Karthikeyan Vaidyanathan, Savitha Krishnamoorthy, Jiesheng Wu, Dhabaleswar K. Panda. 28-35 [doi]
- The BlueGene/L pseudo cycle-accurate simulatorLeonardo R. Bachega, José R. Brunheroto, L. DeRose, Pedro Mindlin, José E. Moreira. 36-44 [doi]
- A co-phase matrix to guide simultaneous multithreading simulationMichael Van Biesbrouck, Timothy Sherwood, Brad Calder. 45-56 [doi]
- Structures for phase classificationJeremy Lau, Stefan Schoenmackers, Brad Calder. 57-67 [doi]
- Deconstructing commitGordon B. Bell, Mikko H. Lipasti. 68-77 [doi]
- Dynamically reducing pressure on the physical register file through simple register sharingLiem Tran, Nicholas Nelson, Fung Ngai, Steve Dropsho, Michael C. Huang. 78-87 [doi]
- Performance evaluation of exclusive cache hierarchiesYing Zheng, Brian T. Davis, Matthew Jordan. 89-96 [doi]
- Keynote IIC. Anderson. 97 [doi]
- Effectiveness of simple memory models for performance predictionIrina Chihaia, Thomas R. Gross. 98-105 [doi]
- Using cache mapping to improve memory performance handheld devicesRong Xu, Zhiyuan Li. 106-114 [doi]
- Characterization of the data access behavior for TPC-C tracesR. Bonilla-Lucas, Peter Plachta, Aamer Sachedina, Daniel Jiménez-González, Calisto Zuzarte, Josep-Lluis Larriba-Pey. 115-122 [doi]
- Cache implications of aggressively pipelined high performance microprocessorsTimothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge. 123-132 [doi]
- Dynamic pretenuring schemes for generational garbage collectionWei Huang, Witawas Srisa-an, J. Morris Chang. 133-140 [doi]
- Selective profiling of Java applications using dynamic bytecode instrumentationMikhail Dmitriev. 141-150 [doi]
- Spectral analysis for characterizing program power and performanceRuss Joseph, Margaret Martonosi, Zhigang Hu. 151-160 [doi]
- Compiler-directed physical address generation for reducing dTLB powerIsmail Kadayif, Partho Nath, Mahmut T. Kandemir, Anand Sivasubramaniam. 161-168 [doi]
- The future of simulation: A field of dreamsBrad Calder, Daniel Citron, Yale N. Patt, James E. Smith. 169 [doi]
- Efficient architectural design of high performance microprocessorsLieven Eeckhout. 170 [doi]
- Architectures and compilers for multimediaW. Wolf. 171 [doi]