Abstract is missing.
- An exact algorithm for coupling-free routingRyan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh. 10-15 [doi]
- RC(L) interconnect sizing with second order considerations via posynomial programmingTao Lin, Lawrence T. Pileggi. 16-21 [doi]
- A performance-driven standard-cell placer based on a modified force-directed algorithmYih-Chih Chou, Youn-Long Lin. 24-29 [doi]
- Reporting of standard cell placement resultsPatrick H. Madden. 30-35 [doi]
- Application of automated design migration to alternating phase shift mask designFook-Luen Heng, Lars Liebmann, Jennifer Lund. 38-43 [doi]
- Reticle enhancement technology trends: resource and manufacturability implications for the implementation of physical designsWarren Grobman, Robert Boone, Cece Philbin, Bob Jarvis. 45-51 [doi]
- Impact of RET on physical layoutsFranklin M. Schellenberg, Luigi Capodieci. 52-55 [doi]
- Design of robust global power and ground networksStephen P. Boyd, Lieven Vandenberghe, Abbas El Gamal, Sunghee Yun. 60-65 [doi]
- Decoupling capacitance allocation for power supply noise suppressionShiyou Zhao, Kaushik Roy, Cheng-Kok Koh. 66-71 [doi]
- Overview of continuous optimization advances and applications to circuit tuningAndrew R. Conn, Chandramouli Visweswariah. 74-81 [doi]
- Design and analysis of physical design algorithmsMajid Sarrafzadeh, Elaheh Bozorgzadeh, Ryan Kastner, Ankur Srivastava. 82-89 [doi]
- Multi-GHz interconnect effects in microprocessorsPhillip Restle, Albert E. Ruehli, Steven G. Walker. 93-97 [doi]
- Min-cut partitioning with functional replication for technology mapped circuits using minimum area overheadWai-Kei Mak. 100-105 [doi]
- Maximum current estimation considering power gatingFei Li, Lei He. 106-111 [doi]
- Estimating routing congestion using probabilistic analysisJinan Lou, Shankar Krishnamoorthy, Henry S. Sheng. 112-117 [doi]
- Dummy feature placement for chemical-mechanical polishing uniformity in a shallow trench isolation processRuiqi Tian, Xiaoping Tang, D. F. Wong. 118-123 [doi]
- Slicing floorplan design with boundary-constrained modulesEn-Cheng Liu, Ming-Shiun Lin, Jianbang Lai, Ting-Chi Wang. 124-129 [doi]
- A regularity-driven fast gridless detailed router for high frequency datapath designsSabyasachi Das, Sunil P. Khatri. 130-135 [doi]
- Revisiting floorplan representationsBo Yao, Hongyu Chen, Chung-Kuan Cheng, Ronald L. Graham. 138-143 [doi]
- Consistent floorplanning with super hierarchical constraintsShigetoshi Nakatake, Yukiko Kubo, Yoji Kajitani. 144-149 [doi]
- ECBL: an extended corner block list with solution space including optimum placementShuo Zhou, Sheqin Dong, Chung-Kuan Cheng, Jun Gu. 150-155 [doi]
- Rectilinear block packing using O-tree representationYingxin Pang, Chung-Kuan Cheng, Koen Lampaert, Weize Xie. 156-161 [doi]
- Congestion estimation during top-down placementXiaojian Yang, Ryan Kastner, Majid Sarrafzadeh. 164-169 [doi]
- Interconnect characteristics of 2.5-D system integration schemeYangdong Deng, Wojciech Maly. 171-175 [doi]
- Hierarchical physical design methodology for multi-million gate chipsWei-Jin Dai. 179-181 [doi]
- Overcoming wireload model uncertainty during physical designPadmini Gopalakrishnan, Altan Odabasioglu, Lawrence T. Pileggi, Salil Raje. 182-189 [doi]
- A minimum cost path search algorithm through tile obstaclesZhaoyun Xing, Russell Kao. 192-197 [doi]
- An exact algorithm for solving difficult detailed routing problemsKolja Sulimma, Wolfgang Kunz. 198-203 [doi]
- Boosters for driving long on-chip interconnects: design issues, interconnect synthesis and comparison with repeatersAnkireddy Nalamalpu, Wayne Burleson. 204-211 [doi]
- Physical design for FPGAsRajeev Jayaraman. 214-221 [doi]
- A comparative study of two Boolean formulations of FPGA detailed routing constraintsGi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar. 222-227 [doi]
- Analysis and optimization of thermal issues in high-performance VLSIKaustav Banerjee, Massoud Pedram, Amir H. Ajami. 230-237 [doi]
- Thermal-ADI: a linear-time chip-level dynamic thermal simulation algorithm based on alternating-direction-implicit (ADI) methodTing-Yuan Wang, Charlie Chung-Ping Chen. 238-243 [doi]