Abstract is missing.
- Can They Be Fixed: Some Thoughts After 40 Years in the BusinessYale N. Patt. 1 [doi]
- On the Benefit of Caching Traffic Flow Data in the Link BufferKonstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch. 2-11 [doi]
- Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT ProcessorEmre Özer, Ronald G. Dreslinski, Trevor N. Mudge, Stuart Biles, Krisztián Flautner. 12-22 [doi]
- Impact of Software Bypassing on Instruction Level Parallelism and Register File TrafficVladimír Guzma, Pekka Jääskeläinen, Pertti Kellomäki, Jarmo Takala. 23-32 [doi]
- Scalable Architecture for Prefix Preserving Anonymization of IP AddressesAnthony Blake, Richard Nelson. 33-42 [doi]
- Arithmetic Design on Quantum-Dot Cellular Automata NanotechnologyIsmo Hänninen, Jarmo Takala. 43-52 [doi]
- Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment ApplicationsSebastian Isaza, Friman Sánchez, Georgi Gaydadjiev, Alex Ramírez, Mateo Valero. 53-64 [doi]
- 802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in BluespecTeemu Pitkänen, Vesa-Matti Hartikainen, Nirav Dave, Gopal Raghavan. 65-74 [doi]
- A Real-Time Programming Model for Heterogeneous MPSoCsTorsten Limberg, Bastian Ristau, Gerhard Fettweis. 75-84 [doi]
- A Multi-objective and Hierarchical Exploration Tool for SoC Performance EstimationAlexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frédéric Robert. 85-95 [doi]
- A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip DesignsFrancesca Palumbo, Simone Secchi, Danilo Pani, Luigi Raffo. 96-105 [doi]
- Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT CoprocessorsXu Guo, Zhimin Chen, Patrick Schaumont. 106-115 [doi]
- Area Reliability Trade-Off in Improved Reed Muller CodingCostas Argyrides, Stephania Loizidou, Dhiraj K. Pradhan. 116-125 [doi]
- Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction SetDaniel Iancu, Mayan Moudgill, John Glossner, Jarmo Takala. 126-135 [doi]
- ASIP-eFPGA Architecture for Multioperable GNSS ReceiversThorsten von Sydow, Holger Blume, Götz Kappen, Tobias G. Noll. 136-145 [doi]
- Introduction to System Level Design for Heterogeneous SystemsJohn McAllister. 146 [doi]
- Streaming Systems in FPGAsStephen Neuendorffer, Kees Vissers. 147-156 [doi]
- Heterogeneous Design in Functional DIFWilliam Plishker, Nimish Sane, Mary Kiemb, Shuvra S. Bhattacharyya. 157-166 [doi]
- Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case StudyAndy D. Pimentel, Todor Stefanov, Hristo Nikolov, Mark Thompson, Simon Polstra, Ed F. Deprettere. 167-176 [doi]
- Evaluation of ASIPs Design with LISATekRashid Muhammad, Ludovic Apvrille, Renaud Pacalet. 177-186 [doi]
- High Level Loop Transformations for Systematic Signal Processing Embedded ApplicationsCalin Glitia, Pierre Boulet. 187-196 [doi]
- Memory-Centric Hardware Synthesis from Dataflow ModelsScott Fischaber, John McAllister, Roger Woods. 197-206 [doi]
- Introduction to Programming MulticoresChris R. Jesshope. 207 [doi]
- Design Issues in Parallel Array Languages for Shared MemoryJames C. Brodman, Basilio B. Fraguela, María Jesús Garzarán, David A. Padua. 208-217 [doi]
- An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of ConcurrencyChris R. Jesshope, Jean-Marc Philippe, Michiel van Tol. 218-228 [doi]
- Climate and Biological Sensor NetworkPerfecto Mariño, Fernando Pérez-Fontán, Miguel Angel Domínguez, Santiago Otero. 229-237 [doi]
- Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre SensorsElfed Lewis, John Clifford, Colin Fitzpatrick, Gerard Dooly, Weizhong Zhao, Tong Sun, K. T. V. Grattan, James Lucas, Martin Degner, Hartmut Ewald, Steffen Lochmann, Gero Bramann, Edoardo Merlone-Borla, Flavio Gili. 238-247 [doi]
- Application Server for Wireless Sensor NetworksJanne Rintanen, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen. 248-257 [doi]
- Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor NetworksJukka Suhonen, Mikko Kohvakka, Marko Hännikäinen, Timo D. Hämäläinen. 258-267 [doi]
- Signature-Based Calibration of Analytical System-Level Performance ModelsStanley Jaddoe, Andy D. Pimentel. 268-278 [doi]
- System-Level Design Space Exploration of Dynamic Reconfigurable ArchitecturesKamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels. 279-288 [doi]
- Intellectual Property Protection for Embedded Sensor NodesMichael Gora, Eric Simpson, Patrick Schaumont. 289-298 [doi]